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     "(i),(i)->()" 
innerwtinner1d with a weight argument 
     "(i),(i),(i)->()" 
matrix_multiplymatrix multiplication on last two dimensions 
     "(m,n),(n,p)->(m,p)" 
matmulmatmul on last two dimensions, with some being optional
     "(m?,n),(n,p?)->(m?,p?)" 
euclidean_pdistpairwise euclidean distance on last two dimensions 
     "(n,d)->(p)" 
cumsumCumulative sum of the input (n)->(n)
inner1d_no_doccross1dcross product on the last dimension and broadcast on the rest 
     "(3),(3)->(3)" 
_pickleable_module_global.ufuncA dotted name for pickle testing, does nothing._pickleable_module_global_ufunccannot load _umath_tests module._umath_teststest_signatureTest signature parsing of ufunc. 
Arguments: nin nout signature 
If fails, it returns NULL. Otherwise it returns a tuple of ufunc internals. 
test_dispatch(i)->(i)(n,d)->(p)(3),(3)->(3)(m?,n),(n,p?)->(m?,p?)(m,n),(n,p)->(m,p)(i),(i),(i)->()(i),(i)->()NPY_DISABLE_CPU_FEATURESLength of environment variable 'NPY_DISABLE_CPU_FEATURES' is %d, only %d accepted, 	
NEONNEON_FP16NEON_VFPV4ASIMDASIMDHPDuring parsing environment variable 'NPY_DISABLE_CPU_FEATURES':
You cannot disable CPU feature '%s', since it is part of the baseline optimizations:
(NEON NEON_FP16 NEON_VFPV4 ASIMD).ASIMDDPASIMDFHMDuring parsing environment variable 'NPY_DISABLE_CPU_FEATURES':
You cannot disable CPU features (%s), since they are not part of the dispatched optimizations
(ASIMDHP ASIMDDP ASIMDFHM).During parsing environment variable 'NPY_DISABLE_CPU_FEATURES':
You cannot disable CPU features (%s), since they are not supported by your machine./proc/self/auxv/proc/cpuinfoFeaturesneonhalfvfpv3vfpv4asimdfpfphpasimdhpasimddpasimdfhmaespmullsha1sha2crc32NumPy was built with baseline optimizations: 
(NEON NEON_FP16 NEON_VFPV4 ASIMD) but your machine doesn't support:
(%s).MMXSSESSE2SSE3SSSE3SSE41POPCNTSSE42AVXF16CXOPFMA4FMA3AVX2AVX512FAVX512CDAVX512ERAVX512PFAVX5124FMAPSAVX5124VNNIWAVX512VPOPCNTDQAVX512VLAVX512BWAVX512DQAVX512VNNIAVX512IFMAAVX512VBMIAVX512VBMI2AVX512BITALGAVX512_KNLAVX512_KNMAVX512_SKXAVX512_CLXAVX512_CNLAVX512_ICLVSXVSX2VSX3VSX4VXVXEVXE2FPHP
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