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facesi / flashrom deb

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flashrom / usr / sbin / flashrom
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Å¿1ÀèV¢ÿÿAöÅLâH5`ÇHEӿ1Àè8¢ÿÿåLâ¿HEÓH5zÇ1Àè¢ÿÿDïèsíÿÿHÄ1À[]A\A]ÃfDóúUSHìè1ðÿÿH5ÒÁ¿¶è1	êè١ÿÿ@íH1HáHIÐH5Æ¿1À象ÿÿï¾èeíÿÿïèþìÿÿHÄ1À[]ÃDóúAUL-71ATL%USHìè¯ïÿÿH5PÁ¿¶è1	êëèU¡ÿÿ@íLê¿IHÔH5÷Ä1Àè8¡ÿÿã@Lê¿IEÔH5ºÆ1Àè¡ÿÿïèÔíÿÿïè½îÿÿïèfìÿÿHÄ1À[]A\A]ÃfóúE19º¾é5ñÿÿDóúUH5ÄÄHý1?赠ÿÿHïE19º¾]éúðÿÿf.óúéóÿÿóúA¸ÿ1ɺ¾éÅðÿÿDóúA¸ÿ¹º¾é¢ðÿÿfóúA¸ÿ1ɺ¾léðÿÿDóúé÷òÿÿóúUSHìèAîÿÿH5â¿¿¶è1	êëèçÿÿ@íH/HïHIÐH5Â¿1À迟ÿÿã@HÊ?HfHDÐH5Å¿1À藟ÿÿï¾èKëÿÿïèäêÿÿHÄ1À[]Ãff.óúA¸ÿ1ɺ¾\éµïÿÿDóúAVL5÷.AUATIüUH-MSèníÿÿH5¿¿D¶è1ÀDêDëèÿÿEíLò¿HHÕH5ËÁ1ÀèôÿÿI$xwoAöÅ@Lñº¿HEÍH5sÁ1ÀèĞÿÿã H0Hö»¿HDÐH5ÃÁ1À蜞ÿÿDï¾èOêÿÿDïèçéÿÿ[1À]A\A]A^Ã@AöÅ@Lò¿HEÕH5ñ¼1ÀèZÿÿëóúéçðÿÿóúAUL-ç-ATUH-BSHìè_ìÿÿH5¾¿D¶à1ÀDâDãèÿÿEäLê¿HHÕH5¼À1ÀèåÿÿAöÄ@LêH5ïÃHEտ1Àèǝÿÿã Lê¿HEÕH5	Ä1À誝ÿÿDç¾è]éÿÿDçèõèÿÿHÄ1À[]A\A]ÃóúHìè³ëÿÿ¶øèêÿÿ1ÀHÄÃ@óúSèëÿÿ¶؉ßÁûèiêÿÿã¿HZ-HØH5ÇÃ1Àè(ÿÿ1À[Ã@óúSèVëÿÿ¶؉ßÁûè)êÿÿã¿HÚ,HØH5Ã1Àèèÿÿ1À[Ã@óúAT1öH
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~H5³辆ÿÿéYÿÿÿfóúU¾HýSHìèéüÿÿH5h²¿Ã1À脆ÿÿ¶ûèüÿÿHï¾òÿÃè½üÿÿH5P²¿Å1ÀèXÿÿ@¶ýèßûÿÿHÄ	Ø[]ÃfDóúU¾HýSHìèyüÿÿH5ø±¿Ã1Àèÿÿ¶ûèûÿÿHï¾òÿÃèMüÿÿH5à±¿Å1Àèèÿÿ@¶ýèoûÿÿHÄ	Ø[]ÃfDóúU¾òÿSHìèüÿÿH5|±¿¶è1À覅ÿÿïèûÿÿïÃè&ûÿÿHÄ	Ø[]Ãff.fóú¾òÿérüÿÿfóú¾òÿébüÿÿfóúUHýSHìè~ÿÿÿHïÃè´{ÿÿHÄ	Ø[]Ãff.óúU¾òÿHýSHìèüÿÿHïÃè{ÿÿHÄ	Ø[]ÃfDóúU¾òÿHýSHìèéûÿÿHïÃèO{ÿÿHÄ	Ø[]ÃfDóú¾òÿéÂûÿÿfóúU¾òÿHýSHìè©ûÿÿHïÃè{ÿÿHÄ	Ø[]ÃfDóúHìH5y±¿1Àèuÿÿ¸ÿÿÿÿHÄÃff.óúHì¾èúÿÿH`v¿H5s±¨HæHDÐ1Àè'ÿÿ1ÀHÄÃPXHìHÿtHùH=«µ¾1ÀH#ýè¨Óüÿ¿H5l²1ÀèeÑüÿ¿èKÓüÿff.ATHñHÿt¶Àt
E1ä<-t(DàA\ÃH=KµH±¾1ÀA¼èBÓüÿëØH=)µH2²¾1Àè&Óüÿë¼@óúSHûöG%^H¸H9C0qC(èøvC,èøH5cH¿1ÀèÿÿC(øt{,t{0t	{4uT1ÀH5·Ã¿èíÿÿ{({,¦{0¹{4ÌH5Öt¿1À貂ÿÿC(øt{,t{0t{4uV1ÀH5Ã¿è}ÿÿ{(³{,Æ{0Ù{4ìH5ft¿1ÀèBÿÿH5kÃ¿1À[é.ÿÿfDC0èøéþÿÿC4èøÚþÿÿ[ÃH5©Á¿1ÀèíÿÿH¸H9C0þÿÿH5RÂ¿1ÀèƁÿÿéwþÿÿ1ÀH5»Ä¿譁ÿÿ{,:ÿÿÿ1ÀH5¥Ä¿萁ÿÿ{0'ÿÿÿ1ÀH5Ä¿èsÿÿ{4ÿÿÿH5zÄ¿1ÀèVÿÿéüþÿÿ1ÀH5KÄ¿è=ÿÿ{,Zþÿÿ1ÀH55Ä¿è ÿÿ{0Gþÿÿ1ÀH5Ä¿èÿÿ{44þÿÿH5
Ä¿1ÀèæÿÿéþÿÿóúATUSûHì H-K²dH%(HD$1Àóo$HBHD$ÿv-E1ä9=ü±sZHD$dH3%(ugHÄ Dà[]A\ÃfDE1ä;=ϱwÓH-²HÑHò¾Hïè3ÈüÿAÄHïèÌüÿë¬fDHÑHïHò¾è
ÈüÿAăûtëÓèÉüÿf.@óúAWL=AVIÖAUIõATAüUH-SL)ýHìè¾üÿHÁýt1ÛLòLîDçAÿßHÃH9ÝuêHÄ[]A\A]A^A_Ãff.óúÃóúHìHÄÃGetting the USB device list failed (%s)!
Reading the USB device descriptor failed (%s)!
Found USB device %04x:%04x at address %d-%d.
Opening the USB device at address %d-%d failed (%s)!
Reading the USB serialno failed (%s)!
Serial number is %s
contextnot PCI header type 0x%02x
Requested BAR is of type ROM
MEMI/O
, %sbit, %sprefetchable
reservedpciError: %s
%s: Tried to undo PCI writes without a valid PCI %s!
Please report a bug at flashrom@flashrom.org
Restoring PCI config space for %02x:%02x:%01x reg 0x%02x
%s: Tried to cleanup an invalid PCI context!
Please report a bug at flashrom@flashrom.org
Unknown PCI header type 0x%02x, BAR type cannot be determined reliably.
MEM BAR access requested, but device has MEM space accesses disabled.
I/O BAR access requested, but device has I/O space accesses disabled.
BAR type unknown, please report a bug at flashrom@flashrom.org
%s: Tried to allocate a new PCI context, but there is still an old one!
Please report a bug at flashrom@flashrom.org
===
This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output
to flashrom@flashrom.org if it works for you. Please add the name of your
PCI device to the subject. Thank you for your help!
===
Error: No supported PCI device found.
Error: Multiple supported PCI devices found. Use 'flashrom -p xxxx:pci=bb:dd.f'
to explicitly select the card with the given BDF (PCI bus, device, function).
Found "%s %s" (%04x:%04x, BDF %02x:%02x.%x).
ÓüÿÝÒüÿÝÒüÿÝÒüÿÓüÿÝÒüÿÝÒüÿÝÒüÿÓüÿÝÒüÿÝÒüÿÝÒüÿÓüÿÝÒüÿÝÒüÿÝÒüÿÓüÿÝÒüÿÝÒüÿÝÒüÿÓüÿÝÒüÿÝÒüÿÝÒüÿÝÒüÿÝÒüÿÝÒüÿÝÒüÿÝÒüÿÝÒüÿÝÒüÿÝÒüÿJÓüÿundo_pci_writepcidev_shutdownpci_init_commonfailedsucceeded 0 1 3>=64busyreadyAccessing byte(s):%s%s%s%s
No ROM device found.
Access is a %s.
Device is %s.
not ready after read
%s: 0x%02x from 0x%*lx.
%s: 0x%02x to 0x%*lx.
not ready after write
offsetMissing argument for offset.
BROM base=0x%08x
Controller not ready.
VIAVT6421A
%s: %s after %d tries (access=0x%02x, status=0x%02x)
ROM device with %s kB attached.
Error: Invalid offset specified: "%s".
Mapping addresses to base %p.
Controller thinks there is no ROM attached.
atavia_readyatavia_chip_writebatavia_chip_readb%s: write %i, read %i Zero length command!
Sending, receivingBBIORaw bitbang mode version %c
Bus Pirate shutdown failed.
30k115200spispeedserialspeedpullupsoffirate 
	 Detected Bus Pirate hardware 0123456789%u.%u ("%s")Detected Bus Pirate firmware HiZ>Using SPI command set v2.
SPI speed is %sHz
Serial speed is %d baud
Raw SPI mode version %c
Enabling pull-up resistors.
2304002500002000000125k250k1M2.6MCan't handle raw bitbang mode version %c!
Bus Pirate shutdown completed.
Bus Pirate communication error!
Protocol error while lowering CS#!
Protocol error while reading/writing SPI!
Protocol error while raising CS#!
Protocol error while sending SPI write/read!
No serial device given. Use flashrom -p buspirate_spi:dev=/dev/ttyUSB0
Invalid pullups state, not using them.
(unknown version number format)Bus Pirate firmware 2.3 and older does not support binary SPI access.
Please upgrade to the latest firmware (at least 2.4).
Bus Pirate firmware 5.4 and older does not support fast SPI access.
Reading/writing a flash chip may take hours.
It is recommended to upgrade to firmware 5.5 or newer.
Bus Pirate firmware 6.1 and older does not support SPI speeds above 2 MHz. Limiting speed to 2 MHz.
It is recommended to upgrade to firmware 6.2 or newer.
Bus Pirate v3 or newer detected. Set serial speed to 2M baud.
Bus Pirate firmware 5.4 and older does not support custom serial speeds.Using default speed of 115200 baud.
Increased serial speeds may not work on older (<3.0) Bus Pirates. Continue at your own risk.
Unable to configure system baud rate to specified value.Can't handle raw SPI mode version %c!
Protocol error while setting power/CS/AUX(/Pull-up resistors)!
Protocol error while setting SPI speed!
Pull-ups enabled, so using HiZ pin output! (Open-Drain mode)
Protocol error while setting SPI config!
Invalid serial speed %s, using default.
Invalid SPI speed, using default.
buspirate_sendrecv %02x
%s: error: %s
%s: Failed to %s %d bytes
Wrote %d bytes:
Read %d bytes:
disCouldnt initialize libusb!
Winchiphead (WCH)CH341A%s: failed to submit OUT transfer: %s
%s: failed to submit IN transfer: %s
Could not %sable output pins.
%s: handle already set! Please report a bug at flashrom@flashrom.org
Couldn't open device %04x:%04x.
Detaching kernel drivers is not supported. Further accesses may fail.
Failed to detach kernel driver: '%s'. Further accesses will probably fail.
Failed to claim interface 0: '%s'
Failed to get device from device handle.
Failed to get device descriptor: '%s'
Device revision is %d.%01d.%01d
Failed to alloc libusb OUT transfer
Failed to alloc libusb IN transfer %d
Could not configure stream interface.
enable_pinsconfig_streamcb_outcb_inch341a_spi_spi_send_commandch341a_spi_initSPI bulk read failed!
Found a %s
SF100SF200SF%d V:%d.%d.%d %s, writecnt=%i, readcnt=%i
24MvoltageEmpty voltage= specified.
millivGarbage voltage= specified.
Setting voltage to %i mV
%c%c%dError: %s is an invalid id!
Using device %li.
targetUsing target %s.
Could not initialize libusb!
Could not read id.
Found dediprog id SF%06d.
Using dediprog id SF%06d.
Unexpected response to init!
Disabling standalone mode.
12M3M2.18M1.5M750k375kDediprogSF100/SF200/SF600Failed to read dediprog id, error %d!
Could not find a Dediprog programmer on USB.
Could not set USB device configuration: %i %s
Could not claim USB device interface %i: %i %s
Unknown voltage %i mV! Aborting.
Setting SPI voltage to %u.%03u V
Command Set SPI Voltage 0x%x failed!
%s: Unsupported transfer length of %u blocks! Please report a bug at flashrom@flashrom.org
Can't handle 4-byte address with dediprog.
Command Set LED 0x%x failed (%s)!
Incomplete/failed Command Receive Device String!
Device not a SF100, SF200, or SF600!
Unexpected firmware version string '%s'
Unexpected firmware version %d.%d.%d!
Internal error: Unable to determine protocol version.
%s: Chunk sizes other than 256 bytes are unsupported, chunksize=%u!
Please report a bug at flashrom@flashrom.org
%s: Unaligned start=%i, len=%i! Please report a bug at flashrom@flashrom.org
Command Write SPI Bulk failed, %s!
SPI bulk write failed, expected %i, got %s!
Page sizes other than 256 bytes are unsupported as we don't know how dediprog
handles them.
Slow write for partial block from 0x%x, length 0x%x
Invalid writecnt=%i, aborting.
Invalid readcnt=%i, aborting.
Send SPI failed, expected %i, got %i %s!
Receive SPI failed, expected %i, got %i %s!
Polling read events failed: %i %s!
Slow read for partial block from 0x%x, length 0x%x
Command Read SPI Bulk failed, %i %s!
Allocating libusb transfer %i failed: %s!
Submitting SPI bulk read %i failed: %s!
Could not release USB interface!
Error: Could not parse dediprog 'id'.
Expected a string like SF012345 or DP012345.
Error: id %s is out of range!
Will search for dediprog id %s.
Error: Cannot use 'id' and 'device'.
Error: Could not convert 'device'.
Error: Value for 'device' is out of range.
Error: Garbage following 'device' value.
Error: Could not convert 'target'.
Error: Value for 'target' is out of range.
Error: Garbage following 'target' value.
FLASH_TYPE_APPLICATION_FLASH_1FLASH_TYPE_APPLICATION_FLASH_2Command Set Voltage failed (%s)!
set_target_flash failed (%s)!
Skipping to set SPI speed because firmware is too old.
Command Set SPI Speed 0x%x failed!
Failed to disable standalone mode: %s
Error: Invalid spispeed value: '%s'.


dediprog_spi_send_commanddediprog_spi_bulk_readprepare_rw_cmddediprog_spi_bulk_writeFailed to read GPIO pins (%s)
Looking for serial number commencing %s
Could not find a Developerbox programmer on USB.
CP2102N USB to UART Bridge ControllerserialSilicon LabsFailed to issue a command: '%s'
Short write issuing a command
Failed to get a response: '%s'
Short read getting a response
Response indicates incorrect length.
%s: failed to write data: '%s'
%s: failed to read data: '%s'
%s: response missing a write count
%s: wrote only %d bytes instead of %d
%s: response missing a read count
%s: read only %d bytes instead of %d
%s: couldn't initialize libusb!
%s: couldn't open device %04x:%04x.
%s: failed to claim interface 0: '%s'
%s: unknown board '%s' not attempting a reset. Override with '-p digilent_spi=reset=1'.
SPI speed set to %d instead of %d
%s: short write
%s: short read
resetiCE40500k62.5kDigilentDevelopment board JTAGdefault_resetspi_tx_enddigilent_spi_send_commanddigilent_spi_initDr. Kaiser PC-Waechter flash memoryDr. KaiserPC-Waechter (Actel FPGA)%s:  addr=0x%lx, returning 0xffffffff
%s:  addr=0x%lx, returning 0xffff
%s:  addr=0x%lx, returning 0xff
%s: addr=0x%lx, len=0x%zx, writing data (hex):%s:  addr=0x%lx, len=0x%zx, returning array of 0xff
Refusing blacklisted SPI command 0x%02x
Ignoring ignorelisted SPI command 0x%02x
Forbidden opcode (0x%02x) attempted during AAI sequence!
WRSR attempted, but WEL is 0!
Max BYTE PROGRAM size exceeded!
Initial AAI WORD PROGRAM size too short!
Initial AAI WORD PROGRAM size too long!
Continuation AAI WORD PROGRAM size too short!
Continuation AAI WORD PROGRAM size too long!
SECTOR ERASE 0x20 outsize invalid!
SECTOR ERASE 0x20 insize invalid!
Unaligned SECTOR ERASE 0x20: 0x%x
BLOCK ERASE 0x52 outsize invalid!
BLOCK ERASE 0x52 insize invalid!
Unaligned BLOCK ERASE 0x52: 0x%x
BLOCK ERASE 0xd8 outsize invalid!
BLOCK ERASE 0xd8 insize invalid!
Unaligned BLOCK ERASE 0xd8: 0x%x
CHIP ERASE 0x60 outsize invalid!
CHIP ERASE 0x60 insize invalid!
CHIP ERASE 0xc7 outsize invalid!
CHIP ERASE 0xc7 insize invalid!
Wrapping the start address around the SFDP table boundary (using 0x%x instead of 0x%x).
Crossing the SFDP table boundary in a single continuous chunk produces undefined results after that point.
Invalid command sent to flash chip!
Enabling support for %s flash.
Support for all flash bus types disabled.
invalid spi_write_256_chunksize
Invalid SPI command blacklist length
Invalid char "%c" in SPI command blacklist
Invalid SPI command ignorelist length
Invalid char "%c" in SPI command ignorelist
Not emulating any flash chip.
Emulating ST M25P10.RES SPI flash chip (RES, page write)
Emulating SST SST25VF040.REMS SPI flash chip (REMS, byte write)
Emulating SST SST25VF032B SPI flash chip (RDID, AAI write)
Emulating Macronix MX25L6436 SPI flash chip (RDID, SFDP)
Emulating Winbond W25Q128FV SPI flash chip (RDID)
Invalid chip specified for emulation: %s
Error: initial status register specified, but the value could not be converted.
Initial status register is set to 0x%02x.
Filling fake flash chip with 0xff, size %i
Found persistent image %s, %jd B %s: Mapping %s, 0x%zx bytes at 0x%0*lx
%s: Unmapping 0x%zx bytes at %p
%02x %s: addr=0x%lx, val=0x%08x
%s: addr=0x%lx, val=0x%04x
%s: addr=0x%lx, val=0x%02x
 writing %u bytes:WRSR wrote 0x%02x.
BYTE PROGRAM size too short!
 reading %u bytes:No command sent to the chip!
Writing %s
busparallellpcfwhspi_write_256_chunksizespi_blacklistSPI blacklist is %2x, size %u
spi_ignorelistSPI ignorelist is emulateM25P10.RESSST25VF040.REMSSST25VF032BMX25L6436W25Q128FVspi_statusimagematches.
Reading %s
Unable to read %s
doesn't match.
defaultRequested buses are: %s
parallel+lpc+fwh+spiÝýÿ¼ýÿZýÿýÿûýÿæýÿòýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿÝýÿgýÿdummy_unmapdummy_mapdummy_shutdowndummy_chip_writebdummy_chip_writewdummy_chip_writeldummy_chip_writendummy_chip_readbdummy_chip_readwdummy_chip_readldummy_chip_readndummy_spi_send_commanddummy_initSFDPÿ	ÿÂHÿÿÿÿÿå Éÿÿÿÿÿk;ÿîÿÿÿÿÿÿÿÿ RØÿÿÿÿÿÿÿÿÿ6'ôOÿÿÙÈÿÿÿÿÿÿftdi_write_data: %d, %s
Assert CS#
ftdi_read_data: %d, %s
get_buf failed: %i
De-assert CS#
send_buf failed at end: %i
unknown deviceFTDIunknown vendortypejtagkeypicotaptumpatumpalitebusblasteropenmokoarm-usb-ocdarm-usb-tinyarm-usb-ocd-harm-usb-tiny-hgoogle-servogoogle-servo-v2google-servo-v2-legacyflyswatterdivisorcsgpiolUsing device type %s %s channel %s.
ftdi_init failed.
Set clock divisor
No loopback of TDI/DO TDO/DI
Set data bits
FT2232HFT4232HFT232HTIAOUSB Multi-Protocol AdapterAmontecJTAGkeyGOEPELPicoTAPGoogleServoServo V2 LegacyServo V2FICOlimexARM-USB-OCDARM-USB-TINYARM-USB-OCD-HARM-USB-TINY-Hsend_buf failed before read: %i
Error: Invalid device type specified.
Error: Invalid channel/port/interface specified: "%s".
Error: Invalid SPI frequency divisor specified: "%s".
Valid are even values between 2 and 131072.
Error: Invalid GPIOL specified: "%s".
Valid values are between 0 and 3.
Unable to select channel (%s).
Unable to open FTDI device: %d (%s).
FTDI chip type %d is not high-speed.
Unable to reset FTDI device (%s).
Unable to set latency timer (%s).
Unable to set chunk size (%s).
Unable to set bitmode to SPI (%s).
Disable divide-by-5 front stage
MPSSE clock: %f MHz, divisor: %u, SPI clock: %f MHz
Unable to close FTDI device: %d (%s)
USB Multi-Protocol Adapter LiteOpenMoko Neo1973 Debug board (V2+)(@N@Detected NVIDIA I/O base address: 0x%x.
RIVA TNT2 Model 64/Model 64 ProNVIDIAMutara V08 [NV2]RIVA 128RIVA TNTRIVA TNT2/TNT2 ProRIVA TNT2 UltraVanta/Vanta LTAladdin TNT2GeForce 256GeForce DDRQuadroGeForce2 MXGeForce2 GOQuadro2 MXRGeForce2 GTS/ProGeForce2 GTSGeForce2 UltraQuadro2 ProGeForce 3 nFXGeForce 3 nFX UltraQuadro 3 DDCFailed to read device.
Failed to write to device.
Unable to contact device.
Whitelisted laptop detected.
abitUsing IT87 GPIO base 0x%04x
DroppRaisBIOS ROM is disabled
OK.
AN-M2^AV8 AV8bf6BF6^i440BX-W977 (BM6)$BM6IC7IP35IP35 ProKN8 Ultra^KN9(NF-MCP55 series)$KN9 UltraNF7-SNF-M2 nView(VA6)$VA6vt6x4VT6X4Acorp6A815EPDAGAMIARUMAagamiArumaAlbatronPM266A Proartecgroupdbe61Artec GroupDBE61dbe62DBE62AOpeni945GMx-VFXi965GMt-LAi975Xa-YDG^iMac5,2$AppleiMac5,2^MacBook2,1$MacBook2,1^ConRoeXFire-eSATA2ASRock^Kabini CRB$IMB-A180(-H)^K7S41 $K7S41^K7S41GX$K7S41GXP4i65GV775i65GASUSA7N8X-VM/400A7V600-XA7V8X-MXA7V8X-MX SEA7V8XA7V333A7V8X-XA8AE-LE^A8JA8JmNODUSM3A8M2N-LA (NodusM3-GL8E)NAGAMI2LA8N-LA (Nagami-GL8E)A8N-VM CSM^DSAN-DX$DSAN-DXM2NBP-VM CSMM2V-MX^M6Ne$M6Ne^OPLX-M$OPLX-M^P2B-N$P2B-NP4B266-LMP4B266P4B533-E^GuppyP4GV-LA (Guppy)P4C800-E DeluxeP4P800^P4P800-E$P4P800-E Deluxe^P4P800-VM$P4P800-VM^P4P800-X$P4P800-X^P4P800SE$P4P800SE^P4PE-X/TE$P4PE-X/TEP4SC-EP4SD-LAP4S800-MX^P5A$asusp5aP5A^P5BV-R$P5BV-R^P5GD1 PRO$P5GD1 Pro^P5GD1-VM$P5GD1-VM/SP5GD1(-VM)^P5GD2-Premium$P5GD2 Premium^P5GD2-X$P5GD2-X^P5GDC-V$P5GDC-V Deluxe^P5GDC$P5GDC DeluxeP5GD2/C variants^LITHIUM$P5LP-LE (Lithium-UL8E)^P5LP-LE$P5LP-LE (Epson OEM)^P5LD2$P5LD2^P5LD2-MQ$P5LD2-MQ^P5LD2-VM$P5LD2-VM^P5LD2-VM DH$P5LD2-VM DHP5ND2-SLI Deluxe^P5N-D$P5N-D^P5N-E SLI$P5N-E SLIP5PE-VM^CUSL2-C^TUSL2-C^U38N$U38NBcom/ClientronWinNET P680^KM266-8235$biostarm7viqBiostarM7VIQ^Latitude D630DellOptiPlex GX1PowerEdge 1850^AD77dfiad77DFIElitegroupA928GeForce6100SM-MK7VTA3EPoXEP-8K5A2EP-8NPA7IEP-9NPA7IEP-8RDA3+epoxep-bx3EP-BX3Foxconn6150K8MD-8EKRSH^XY680FujitsuAmilo Xi 3650^6IEM GIGABYTEGA-6IEMGA-7ZM^8IP775/-G$GA-8IP775GA-8IRMLGA-8PE667 Ultra 2^GA-8SIMLFS20$GA-8SIMLFS 2.0^GA-8SIMLH$GA-8SIMLHGA-K8N51GMFGA-K8N51GMF-9GA-K8NSGA-K8N-SLIHPe-Vectra P2706Thpdl145_g3ProLiant DL145 G3dl165_g6ProLiant DL165 G6Puffer2-UL8EVectra VL400^VL420$Vectra VL420 SFFxw9400ibasemb899MB899IBMx3455IntelD201GLY^D945GCNL$D945GCNL^SE440BX-2$SE440BX-2iwilldk8_htxIWILLDK8-HTXkontron986lcd-mKontron986LCD-M^ThinkPad R400IBM/Lenovo^ThinkPad T400^ThinkPad T500^ThinkPad T530^ThinkPad T60ThinkPad T60(s)^ThinkPad W500^ThinkPad X200^ThinkPad X201lenovox220ThinkPad X220^ThinkPad X230^ThinkPad X60ThinkPad X60(s)^Taurinus X200LibiquityMitac6513WU^MSC Vertriebs GmbH$MSCQ7-TCTC^MS-6163 (i440BX)$MSIMS-6163 (MS-6163 Pro)MS-6391 (845 Pro4)^MS-6561MS-6561 (745 Ultra)MS-6577 (Xenon)MS-6590 (KT4 Ultra)^MS-7094$MS-7094 (K8T Neo2-F V2.0)MS-6712 (KT4V)msims6787MS-6787 (P4MAM-V/P4MAM-L)MS-6788-040 (848P NeoV)MS-7005 (651M-L)MS-7025 (K8N Neo2 Platinum)MS-7030 (K8N Neo Platinum)MS-7046MS-7061 (KM4M-V/KM4AM-V)k8n-neo3MS-7135 (K8N Neo3)MS-7207 (K8NGM2-L)MS-7250 (K9N SLI)NokiaIP530^EasyNote LM85$Packard BellEasyNote LM85RV11$RodaLizard RV11SamsungPolaris 32shuttleak31ShuttleAK31AK38NSoyoSY-7VCA^Sun Ultra 40 M2SunTekramP6Pro-A5TermtekTK-3370 (Rev:2.5B)TriGemAnaheim-3TyanS2498 (Tomcat K7M)EPIA EKEPIA M/MII/...EPIA-N/NLLaptop detection overridden by P2 board enable.

ERROR: Intel PIIX4 ISA bridge not found.

ERROR: PIIX4 GPO%d not programmed for output.

ERROR: Intel PIIX4 PM not found.
MCP LPC bridge at unexpected function number %d
MCP SMBus controller could not be found
Unexpected device class %04x for SMBus controller

ERROR: no NVIDIA LPC/SMBus controller found.
Warning: Can't autodetect %s %s, DMI info unavailable.
Please supply the board vendor and model name with the -p internal:mainboard=<vendor>:<model> option.
Odd. Board name "%s":"%s" matches, but first PCI device %04x:%04x doesn't.
Odd. Board name "%s":"%s" matches, but second PCI device %04x:%04x doesn't.
Board name "%s":"%s" and PCI IDs matched more than one board enable entry. Please report a bug at flashrom@flashrom.org
Warning: The mainboard-specific code for %s %s has not been tested,
and thus will not be executed by default. Depending on your hardware,
erasing, writing or even probing can fail without running this code.

Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection
"internal programmer") for details.
NOTE: Running an untested board enable procedure.
Please report success/failure to flashrom@flashrom.org.

ERROR: NVIDIA MCP61 SMBus not found.

ERROR: NVIDIA MCP55 LPC bridge not found.

ERROR: AMD SMBus Controller (0x4372) not found.
Board match found, but nothing to do?

ERROR: IT8703F Super I/O not found.

ERROR: Failed to read IT8703F Super I/O GPIO Base.
Expected south bridge not found

ERROR: No IT87 Super I/O GPIO configuration found.

ERROR: IT%02X does not allow setting GPIO%02u.

ERROR: Failed to read IT87 Super I/O GPIO Base.

ERROR: Intel 82801AA ISA bridge not found.

ERROR: SMSC Super I/O not found.

ERROR: Super I/O runtime interface not available.

ERROR: VT82C686 PM device not found.

VIA Apollo ACPI: %sing GPIO%02d.

ERROR: This Intel LPC bridge does not allow setting GPIO%02d

Intel ICH LPC bridge: %sing GPIO%02d.

ERROR: No known Intel LPC bridge found.

ERROR: VT823x ISA bridge not found.

ERROR: VT823x GPIO%02d is not implemented.
PC8736x: unexpected ID %02x (expected %02x)
PC87360: invalid GPIO base address %04x
Warning: Flash interface in use by GPIO!

ERROR: Found Winbond chip with ID 0x%x, expected %x

ERROR: winbond_gpio_set: Invalid GPIO number %d

ERROR: GPIO%d is not supported yet on this winbond chip

ERROR: No supported Winbond Super I/O found

ERROR: FDC37B787: Wrong ID 0x%02X.

ERROR: GPIO50 mode 0x%02X unexpected.
W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect.
Found ITE Super I/O, ID 0x%04hx on port 0x%x
Active config mode, unknown reg 0x20 ID: %02x.
Found Winbond Super I/O, id 0x%02hx
Winbond Super I/O probe weirdness: Port mismatch for ID 0x%02x at port 0x%04x
W836xx hardware monitor disabled or does not exist.
W836xx Hardware Monitor at port %04x
W836xx hardware monitor busy, ignoring it.
W836xx hardware monitor vendor ID weirdness: expected 0x5ca3, got %04x
Probably not a Winbond Super I/O
W83 series hardware monitor device ID weirdness: expected 0x%02x, got 0x%02x
Enabling IT8705F flash ROM interface write.
IT8705F with very unusual settings.
Please send the output of "flashrom -V -p internal" to flashrom@flashrom.org
with "IT8705: your board name: flashrom -V" as the subject to help us finish
support for your Super I/O. Thanks.
Inconsistent IT8705F decode size!
IT8705F flash data pins disabled!
IT8705F flash address pins 0-7 disabled!
IT8705F flash address pins 8-15 disabled!
IT8705F flash write enable pin disabled!
IT8705F flash chip select pin disabled!
IT8705F flash read strobe pin disabled!
IT8705F flash address pins 16-17 disabled!
Maximum IT8705F parallel flash decode size is %u.
Not enabling IT8705F flash write.
No IT8705F flash segment enabled.
ERROR: Board enable #%d does not define a vendor and board name.
Please report a bug at flashrom@flashrom.org
ERROR: Board enable for %s %s is misdefined.
Please report a bug at flashrom@flashrom.org
-p internal:mainboard: vendor="%s", model="%s"
No suitable board enable found for vendor="%s", model="%s".
No board enable found matching coreboot IDs vendor="%s", model="%s".
Enabling full flash access for board "%s %s"... MS-7125 (K8N Neo4(-F/-FI/-FX/Platinum))büóÏ?ÿüb|óÏ?ßüó
°°°°°°°°°°NNN²²²²²²  ²@@²²²  ²@@²N$Xã $Xã@$X9ÿL$X9#P$Xÿ$Xÿÿ$X#ÿÀ$XÿÿÌ$XÿÐ$Xÿ@&HÿA&Hÿ°'Hÿÿÿÿÿ¸'Hÿÿÿÿÿ¹'Hþÿëÿþ½'Hþÿëÿþ(Hÿÿÿÿÿÿ(Hÿÿÿÿÿÿ(Hÿÿÿÿÿÿ(Hÿÿÿÿÿÿ(Hÿÿÿÿÿÿ)Hÿÿÿÿÿÿÿ)Hÿÿÿÿÿÿÿ)Hÿÿÿÿÿÿÿ)Hÿÿÿÿÿÿÿ)Hÿÿÿÿÿÿÿ)Hÿÿÿÿÿÿÿ:Hÿÿÿÿÿÿÿÿ:Hÿÿÿÿÿÿÿÿ:Hÿÿÿÿÿÿÿÿ:Hÿÿÿÿÿÿÿÿ------  -@@-))$$*****++@@+  ++++Found candidate at: %08lx-%08lx
Header bytes of %d are incorrect.
Found coreboot table at 0x%08lx.
Vendor ID: %.*s, part ID: %.*s
Flash image seems to be a legacy BIOS. Disabling coreboot-related checks.
Flash image seems to have garbage in the ID location. Disabling coreboot-related checks.
coreboot last image size (not ROM size) is %d bytes.
This coreboot image matches this mainboard.
This coreboot image (%s:%s) does not appear to
be correct for the detected mainboard (%s:%s).
Failed getting access to coreboot low tables.
Failed getting access to coreboot high tables.
coreboot table found at 0x%lx.
coreboot header(%d) checksum: %04x table(%d) checksum: %04x entries: %d
Bad header checksum.
Bad table checksum: %04x.
Bad record count: %d.
%.*sManufacturer: %s
Mainboard ID: %s
low megabyteNo coreboot table found.
high tablesGCSBIOS_SPI_BCenabled (A16(+) inverted)not enabled%s = 0x%x: Boot BIOS Straps: 0x%x (%s)
Top Swap: %s
SPI Read Configuration: 
BIOS_CNTL = 0x%02x: BIOS Lock Enable: %sabled, BIOS Write Enable: %sabled
Disabling byte merging
Stuck at 0x%02x.
OK
BYT IBASEfwh_idselBYT RCRBSPI_BASE_ADDRESS = 0x%x
BYT SBASEFlash bus type is LPC
Flash bus type is SPI
No southbridge found for %s!
Stuck at 0x%02x
Elan SC520 MMCRwrite read : LPC: PCI: FWH: SPICan't allocate PCI accessor.
Can't allocate PCI device.
SPIBARICH RCRBSPIBAR = 0x%0*lx + 0x%04x
Strapped to LPC.
MMIO not enabled!
VIA VX MMIO registerSPI Bus0 disabled!
SPI Bus1 is enabled too.
ATIFound chipset "%s %s" with PCI ID %04x:%04xEnabling flash write... PROBLEMS, continuing anyway
FATAL ERROR!
unknownSB400AMDSB600SB7x0/SB8x0/SB9x0SC1100CS5536Elan SC520AMD-768AMD-8111FCHFP4SiS501/5101/550185C496+497620635640645645DX651655661730733735740741745746748755551155715591/559255965597/5598/5581/5120CS5530(A)ALiM1533nForce4/MCP4CK804NForce2NForce3MCP51MCP55MCP61MCP65MCP67MCP78SMCP73MCP79MCP89VT82C585VPXVT82C595VT82C597VT8601/VT8601AVT82C69xVT8601TVT82C586A/BVT82C596VT82C686A/BVT8233VT8233AVT8235VT8237(R)VT8251VT8237AVT8237SVT8231CX700VX800/VX820VX855/VX875VX900BroadcomOSB4HT-1000RDCR8610/R3210S12x0Bay TrailMPIIXZ68UM67HM65HM67Q65QS67Q67QM67B65C202C204C206H61C60x/X79Z77Z75Q77Q75B75H77C216QM77QS77HM77UM77HM76HM75HM70NM70Avoton/RangeleyBraswellDH89xxCC (Cave Creek)Coleto CreekICH0ICH2ICH2-MC-ICHICH3-SICH3-MICH4/ICH4-LICH4-MICH5/ICH5R6300ESBICH6/ICH6RICH6-MICH6W/ICH6RW631xESB/632xESB/3100ICH7DHICH7/ICH7RICH7MNM10ICH7MDHICH8/ICH8RICH8M-EICH8DHICH8DOICH8MICH9 Eng. SampleICH9DHICH9DOICH9RICH9M-EICH9ICH9MICH10R Eng. SampleICH10DOICH10RICH10ICH10DICH10 Eng. Sample3400 Desktop3400 MobilePM55H55QM57H57HM55Q57HM573400 Mobile SFFB55QS57340034203450EP80579PIIX3PIIX4/4E/4M440MXSCH PoulsboAtom E6xx(T) (Tunnel Creek)Lynx Point Mobile Eng. SampleZ87Z85HM86H87HM87Q85Q87QM87B85C222C224C226H819 Series9 Series Engineering SampleZ97H97C610/X99 (Wellsburg)Lynx Point LP Eng. SampleLynx Point LP PremiumLynx Point LP MainstreamLynx Point LP ValueHaswell U SampleBroadwell U SampleBroadwell U PremiumBroadwell U BaseBroadwell Y SampleBroadwell Y PremiumBroadwell Y BaseBroadwell HSkylake / Kaby Lake SampleSkylake U BaseSkylake Y PremiumSkylake U PremiumKaby Lake Y w/ iHDCP2.2 Prem.Kaby Lake U w/ iHDCP2.2 Prem.Kaby Lake U w/ iHDCP2.2 BaseKabe Lake w/ iHDCP2.2 SampleKaby Lake U BaseKaby Lake Y PremiumKaby Lake U PremiumCannon Lake U PremiumSunrise Point Desktop SampleSunrise Point Unknown SampleH110H170Z170Q170Q150B150C236C232Sunrise Point Server SampleQM170HM170CM236QMS180HM175QM175CM238QMU185C621 Series Chipset (QS/PRQ)C622 Series Chipset (QS/PRQ)C624 Series Chipset (QS/PRQ)C625 Series Chipset (QS/PRQ)C626 Series Chipset (QS/PRQ)C627 Series Chipset (QS/PRQ)C628 Series Chipset (QS/PRQ)C624 Series Chipset SuperskuC627 Series Chipset SuperskuC621 Series Chipset SuperskuC628 Series Chipset SuperskuC620 Series Chipset SuperskuH270Z270Q270Q250B250Z370X299Apollo LakeH310H370Z390Q370B360C246C242QM370HM370CM246Ice Lake U PremiumBIOS Interface Lock-Down: %sabled, BIOS Prefetch Enable: %sabled, invalid prefetching/caching settings, prefetching %sabled, caching %sabled, Warning: BIOS region SMM protection is enabled!
Warning: Setting Bios Control at 0x%x from 0x%02x to 0x%02x failed.
New value is 0x%02x.
Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY).
Changed ROM decode range to 0x%02x successfully.
Set ROM enable bit successfully.
Setting register 0x6d to 0x%02x on %s failed.
Can not unlock existing protection in register 0x%02x.
Unlocking protection in register 0x%02x... Could not unlock protection in register 0x%02x (new value: 0x%x).
Could not unlock protection in register 0x%02x (new value: 0x%08x).
%d locks could not be disabled, disabling writes (reads may also fail).
Setting register 0x%02x to 0x%02x on %s failed.
Setting register 0x%04x to 0x%04x on %s failed (WARNING ONLY).
Error: Invalid ILB_BASE_ADDRESS
Error: fwh_idsel= specified, but (yet) unsupported on this chipset.
Error: fwh_idsel= specified, but value could not be converted.
Error: fwh_idsel= specified, but value had unused bits set.
Setting IDSEL from 0x%012lx to 0x%012lx for top 16 MB.
Error: fwh_idsel= specified, but no value given.
0x%08x/0x%08x FWH IDSEL: 0x%x
0x%08x/0x%08x FWH decode %sabled
Maximum FWH chip size: 0x%x bytes
FWH IDSEL handling is not implemented on this chipset.
Root Complex Register Block address = 0x%x
ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 is %i
Flash bus type is unknown (none)
Please send the log files created by "flashrom -p internal -o logfile" to
flashrom@flashrom.org with "your board name: flashrom -V" as the subject to
help us finish support for your chipset. Thanks.
Found southbridge %04x:%04x at %02x:%02x:%01x
AMD Elan SC520 detected, but no BOOTCS. Assuming flash at 4G.
Chipset %s%sprotected flash from 0x%08x to 0x%08x, unlocking...Disabling %s%sprotection of flash addresses from 0x%08x to 0x%08x failed.
ROM strap override is %sactiveSPIBAR = 0x%0*lx (phys = 0x%08x)

Warning: Failed to enable flash write on "%s"
ERROR: SMBus device not found. Aborting.
Could not find South-North Module Interface Control device!
%s: Unsupported chipset %x:%x!
Warning: unexpected second chipset match: "%s %s"
ignoring, please report lspci and board URL to flashrom@flashrom.org
with 'CHIPSET: your board name' in the subject line.
ERROR: This chipset is not supported yet.
This chipset is marked as untested. If you are using an up-to-date version
of flashrom *and* were (not) able to successfully update your firmware with it,
then please email a report to flashrom@flashrom.org including a verbose (-V) log.
Thank you!
Skipping chipset enable: No supported buses enabled.
OK - searching further chips.
Lynx Point Desktop Eng. SamplepýÿýÿPýÿPýÿPýÿ`ýÿ`ýÿ`ýÿ[ýÿ[ýÿ@ýÿpýÿ[ýÿ@ýÿ@ýÿ@ýÿ@ýÿ ýÿenable_flash_vt_vxboardenableboardmismatchforce_I_want_a_brickthis_is_not_a_laptopMissing argument for laptop.
mainboardContinuing anyway.
Aborting to be safe.
Missing argument for boardenable.
Unknown argument for boardenable: %s
Missing argument for boardmismatch.
Unknown argument for boardmismatch: %s
Unknown argument for laptop: %s
Missing argument for mainboard.
Processor detection/init failed.
Aborting.
Warning: The mainboard IDs set by -p internal:mainboard (%s:%s) do not
         match the current coreboot IDs of the mainboard (%s:%s).
WARNING: No chipset found. Flash detection will most likely fail.
========================================================================
You seem to be running flashrom on an unknown laptop. Some
internal buses have been disabled for safety reasons.

You may be running flashrom on an unknown laptop. We could not
detect this for sure because your vendor has not set up the SMBIOS
tables correctly. Some internal buses have been disabled for
safety reasons. You can enforce using all buses by adding
  -p internal:laptop=this_is_not_a_laptop
to the command line, but please read the following warning if you
are not sure.

Laptops, notebooks and netbooks are difficult to support and we
recommend to use the vendor flashing utility. The embedded controller
(EC) in these machines often interacts badly with flashing.
See the manpage and https://flashrom.org/Laptops for details.

If flash is shared with the EC, erase is guaranteed to brick your laptop
and write may brick your laptop.
Read and probe may irritate your EC and cause fan failure, backlight
failure and sudden poweroff.
You have been warned.
========================================================================
IMC SIO is at 0x%x.
IMC MBOX is at 0x%x.
IMC MBOX: Timeout!
Resuming IMC failed)
IMC resumed.
No IMC found.
Shutting down IMC failed.
Shutting down IMC successful.
Using Internal DMI decoder.
_DMI_DMI TableUnable to access DMI Table
Not Specified<OUT OF BOUNDS><BAD INDEX>No DMI table found.
Laptop detected via DMI.
DMI string %s: "%s"
matching %s against %s
OtherUnknownLow Profile DesktopMini TowerPortableLaptopHand HeldSub NotebookMain Server ChassisRack Mount ChassisSealed-case PCMulti-systemsystem-manufacturersystem-product-namesystem-versionbaseboard-manufacturerbaseboard-product-namebaseboard-versionWarning: Could not register DMI shutdown function - continuing without DMI info.
DMI table is broken (bogus header)!
DMI string chassis-type: "%s"
DMI table is broken (chassis_type out of bounds)!
DMI table is broken (offset out of bounds)!
DMI table is broken (string portion out of bounds)!
DMI chassis-type is not specific enough.
HSFS: FDONE%s=%d, FCERRAELBERASESCIPPRR34_LOCKDNWRSDISFDOPSSFDVFLOCKDN%s=%d
HSFC: FGOHSFCWETFCYCLEFDBCSMESSFS: SSFC: SCGOACSSPOPCOPSCF
%s: null OPCODES pointer!
%s: unsupported chipset
Transaction error!
timeout, REG_SSFS=0x%08x
Running OPCODE 0x%02x failed at address 0x%06x (payload length was %d).
The data was:
%3d: 0x%02x
Opcode %x not found.
Error: SCIP never cleared!
s with a combined with a density of %d kB.
HSFC used for block erasing: BBAR offset is unknown!
invalidReading OPCODES... Programming OPCODES... done
op[%d]: 0x%02x, %s, %s
0x00: 0x%04x     (SPIS)
0x02: 0x%04x     (SPIC)
0x04: 0x%08x (SPIA)
0x50: 0x%08x (BBAR)
0x54: 0x%04x     (PREOP)
0x56: 0x%04x     (OPTYPE)
0x58: 0x%08x (OPMENU)
0x5c: 0x%08x (OPMENU+4)
0x%02x: 0x%08x (PBR%u)
ich_spi_modehwsequser selected hwseq
swsequser selected swseq
autouser selected auto
0x04: 0x%04x (HSFS)
0x08: 0x%08x (FADDR)
0x0c: 0x%08x (DLOCK)
DLOCK: SBMWAG_LOCKDNSBMRAG_LOCKDN%s=%d,
       PR0_LOCKDNPR1_LOCKDNPR2_LOCKDNPR3_LOCKDNPR4_LOCKDNSSEQ_LOCKDN0x50: 0x%08x (FRAP)
BMWAG 0x%02x, BMRAG 0x%02x, BRWA 0x%02x, BRRA 0x%02x
0x%02X: 0x%08x read-writePR%u is 0x%08x already.
, trying to set it to 0x%08x resulted in 0x%08x.
0x%zx: 0x%02x (SSFS)
Clearing SSFS.FCERR
0x%zx: 0x%06x (SSFC)
0x%zx: 0x%04x     (PREOP)
0x%zx: 0x%04x     (OPTYPE)
0x%zx: 0x%08x (OPMENU)
0x%zx: 0x%08x (OPMENU+4)
0x%x: 0x%08x (BBAR)
0x%x: 0x%08x (VSCC)
0x%x: 0x%08x (LVSCC)
LVSCC: 0x%x: 0x%08x (UVSCC)
UVSCC: 0x%x: 0x%08x (FPB)
checking for opcode 0x%02x
0x06: 0x%04x (HSFC)
VIA SPI MMIO registers0x%02x: 0x%08x (SPID%d)
0x%02x: 0x%08x (SPID%d+4)
0x%02x: 0x%08x (PBR%d)
Flash DescriptorManagement EngineGigabit EthernetPlatform DataDevice ExpansionBIOS2EC/BMCnone 0   1  read  w/o addrwrite w/o addrread  w/  addrwrite w/  addrlockedread-onlywrite-only
%s: preop=%04x optype=%04x opmenu=%08x%08x
Transaction error between offset 0x%08x and 0x%08x (= 0x%08x + %d)!
Timeout error between offset 0x%08x and 0x%08x (= 0x%08x + %d)!
on-the-fly OPCODE (0x%02X) re-programmed, op-pos=%d
OPCODE 0x%02x has unsupported length, will not execute.
Invalid OPCODE 0x%02x, will not execute.
%s: Internal command size error for opcode 0x%02x, got writecnt=%i, want =4
%s: Internal command size error for opcode 0x%02x, got writecnt=%i, want =1
%s: Internal command size error for opcode 0x%02x, got writecnt=%i, want >=4
%s: Internal command size error for opcode 0x%02x, got readcnt=%i, want =0
%s: Addressed region 0x%06x-0x%06x not in allowed range 0x%06x-0x%06x
%s: Internal command size error for opcode 0x%02x, got datalength=%i, want <=%i
timeout, ICH7_REG_SPIS=0x%04x
Hardware sequencing reports %d attached SPI flash chipThere is only one partition containing the whole address space (0x%06x - 0x%06x).
There are %d erase blocks with %d B each.
The flash address space (0x%06x - 0x%06x) is divided at address 0x%06x in two partitions.
The first partition ranges from 0x%06x to 0x%06x.
In that range are %d erase blocks with %d B each.
The second partition ranges from 0x%06x to 0x%06x.
Erase block size for address 0x%06x is %d B, but requested erase block size is %d B. Not erasing anything.
Erase address 0x%06x is not aligned to the erase block boundary (any multiple of %d). Not erasing anything.
Request to erase some inaccessible memory address(es) (addr=0x%x, len=%d). Not erasing anything.
Erasing %d bytes starting at 0x%06x.
Request to write to an inaccessible memory address (addr=0x%x, len=%d).
Writing %d bytes starting at 0x%06x.
Request to read from an inaccessible memory address (addr=0x%x, len=%d).
Reading %d bytes starting at 0x%06x.
Reserved bits in BBAR not zero: 0x%08x
Setting BBAR to 0x%08x failed! New value: 0x%08x.
        OP        Type      Pre-OP
Pre-OP 0: 0x%02x, Pre-OP 1: 0x%02x
%s: Two subsequent preopcodes 0x%02x and 0x%02x, ignoring the first.
WARNING: SPI Configuration Lockdown activated.
Missing argument for ich_spi_mode.
Unknown argument for ich_spi_mode: %s
SPI Configuration is locked down.
The Flash Descriptor Override Strap-Pin is set. Restrictions implied by
the Master Section of the flash descriptor are NOT in effect. Please note
that Protected Range (PR) restrictions still apply.
0x%02X: 0x%08x FREG%u: %s region is unused.
FREG%u: %s region (0x%08x-0x%08x) is %s.
FREG%u: %s region (0x%08x-0x%08x) has unknown permissions.
Not all flash regions are freely accessible by flashrom. This is most likely
due to an active ME. Please see https://flashrom.org/ME for details.
0x%02X: 0x%08x (%sPR%u is unused)
%sPR%u: Warning: 0x%08x-0x%08x is %s.
At least some flash regions are write protected. For write operations,
you should use a flash layout and include only writable regions. See
manpage for more details.
At least some flash regions are read protected. You have to use a flash
layout and include only accessible regions. For write operations, you'll
additionally need the --noverify-all switch. See manpage for more details.
Enabling hardware sequencing due to multiple flash chips detected.
Enabling hardware sequencing by default for Apollo Lake.
Hardware sequencing was requested but the flash descriptor is not valid. Aborting.
Could not determine density of flash component %d.
Enabling hardware sequencing by default for 100+ series PCH.
Enabling hardware sequencing because some important opcode is locked.
0x6c: 0x%04x     (CLOCK/DEBUG)
Warning: SPI Configuration Lockdown activated.

 run_opcodeich_spi_send_commandprogram_opcodesfind_preopfind_opcodeich_spi_send_multicommandØÇ R RØ`ÇP%s():%d %s%s():%d
%s():%d was called ...
%s():%d * Max try reached.
* timeout at taking command.
%s():%d * SUCCESS.
FWH: %s():%d ret=%d
%s():%d shm_io_base=0x%04x
Registering IT85 SPI.
* timeout at waiting for IBF==0.
%s():%d * not run on SRAM ret=%d
%s():%d * timeout at waiting for OBF.
%s():%d buses not support FWH
%s():%d superio.vendor=0x%02x
%s: internal_buses_supported=0x%x
it85xx_exit_scratch_romit85xx_shutdownit85xx_spi_common_initit85xx_enter_scratch_romit85xx_spi_init%s called with unsupported readcnt %i.
%s called with unsupported writecnt %i.
Found ITE EC, ID 0x%04hx, Rev 0x%02x on port 0x%x.
DualBIOS: Invalid chip index requested - choose 0 or 1.
DualBIOS: Previous chip index: %d
DualBIOS: Chip selection failed.
No IT87* serial flash segment enabled.
Serial flash segment 0x%08x-0x%08x %sabled
Error: it87spiport specified, but no valid port specified.
Port must be a multiple of 0x8 and lie between 0x100 and 0xff8.
Forcing serial flash port 0x%04x
Overriding chipset SPI with IT87 SPI.
Super I/O ID 0x%04hx is not on the list of flash-capable controllers.
LPC write to serial flash %sabled
Enabling LPC write to serial flash
dualbiosindexDualBIOS: Selected chip: %d
Serial flash pin %i
Serial flash port 0x%04x
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lýÿit8716f_spi_send_commandERROR: SMBus device not found. Not enabling SPI.
Found SMBus device %04x:%04x at %02x:%02x:%01x
Error: Chipset is strapped for SPI, but MCP SPI BAR is invalid.
Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled.
SPI control is 0x%04x, req=%i, gnt=%i
MCP6X bitbang SPI master init failed!
Odd. SMBus device not found.
MCP SPI BAR is at 0x%08x
MCP SPI is not used.
NVIDIA MCP6x SPIAMD SPI FIFO pointer corruption! Pointer is %d, wanted %d
Something else is accessing the flash chip and causes random corruption.
Please stop all applications and drivers and IPMI which access the flash chip.
AMD SPI FIFO pointer is %d, wanted %d
No SMBus device with ID %04X:%04X found.
%s: SPI controller can not send %d bytes, it is limited to %d bytes
%s: SPI controller can not receive %d bytes, it is limited to %d bytes
%s, cmd=0x%02x, writecnt=%d, readcnt=%d
Unexpected change in AMD SPI read/write count!
Trying to determine the generation of the SPI interface... SB8xx/SB9xx/Hudson-1 detected.
SB device found but SMBus revision 0x%02x does not match known values.
Assuming SB8xx/SB9xx/Hudson-1. Please send a log to flashrom@flashrom.org
FCH device found but SMBus revision 0x%02x does not match known values.
Please report this to flashrom@flashrom.org and include this log and
the output of lspci -nnvx, thanks!.
%s: Unknown LPC device %x:%x.
Please report this to flashrom@flashrom.org and include this log and
the output of lspci -nnvx, thanks!
Could not determine chipset generation., AltSpiCSEnable=%i, AbortEnable=%i, SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i, DropOneClkOnRd/SpiClkGate=%iERROR: State of SpiAccessMacRomEn or SpiHostAccessRomEn prohibits full access.
Setting read mode to "%s" failed.
Setting read mode to "%s" succeeded.
Setting SPI clock to %s (0x%x).
Missing argument for amd_imc_force.
Unknown argument for amd_imc_force: "%s" (not "yes").
Writes have been disabled for safety reasons because the presence of the IMC
was detected and it could interfere with accessing flash memory. Flashrom will
try to disable it temporarily but even then this might not be safe:
when it is re-enabled and after a reboot it expects to find working code
in the flash and it is unpredictable what happens if there is none.

To be safe make sure that there is a working IMC firmware at the right
location in the image you intend to write and do not attempt to erase.

You can enforce write support with the amd_imc_force programmer option.
Continuing with write support because the user forced us to!
Executing... reset
Filling buffer: [%02x]Reading buffer: Filling FIFO: Skipping: Reading FIFO: GPIOSPI_DOSPI_HOLD66 MHzSPI base address is at 0x%x
SB600 SPI registersSB6xx detected.
SB7xx/SP5100 detected.
Hudson-2/3/4 detected.
Bolton detected.
Yangtze detected.
Promontory detected.
SpiRomEnable=%i, RouteTpm2Sp=%i, PrefetchEnSPIFromIMC=%i, SpiOpEnInLpcMode=%i, PrefetchEnSPIFromHost=%i
(0x%08x) SpiArbEnable=%i, IllegalAccess=%i, SpiBridgeDisable=%i, SpiBusy=%iUsing SPI_CS%d
GPIO11 used for %s
SPI_DIGPIO12 used for %s
Not enabling SPIGPIO31 used for %s
SpiReadMode=%s (%i)
Normal (up to 66 MHz)Enabling Spi100 failed.
Enabling Spi100 succeeded.
NormSpeedNew is %s
FastSpeedNew is %s
AltSpeedNew is %s
TpmSpeedNew is %s
NormSpeed is %s
Setting SPI clock failed.
amd_imc_forceyesamd_imc_force enabled.
IMC is not active.
UseSpi100 is %sabled
Fast Reads are %sabled
Disabling them temporarily.
GPIO47 used for %s
SPI_CLKGPIO32 used for %s
SPI_CSNormal (up to 33 MHz)ReservedDual IO (1-1-2)Quad IO (1-1-4)Dual IO (1-2-2)Quad IO (1-4-4)Fast Read33 MHz22 MHz16.5 MHz100 MHz800 kHzdetermine_generationsb600_spi_send_commandcheck_readwritecntspi100_spi_send_command cmd=%02x mode=%02x
 data=0x%02x addr=0x%02x data=0x%s: returning data =
wbsio_spibase = 0x%x
%s: unsupported command type wr=%d rd=%d

W83627 not found at 0x%x, id=0x%02x want=0xa0.

W83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0)

W83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0)
%s: Winbond saved on 4 register bits so max chip size is 1024 kB!
wbsio_spi_send_commandwbsio_check_for_spiIT8212F flash8212F PATA RAIDCannot seek to 0x%06x: %s
Failed to flush buffer: %s
%s/%sCannot open %s
%s: ioctl: %s
Error reading %s
Error reading %s: %s
/sys/class/mtd%s/mtd%d%s does not exist
%s/mtd%d/nor/devCannot stat "%s": %s
flagsMTD size is not a power of 2
erasesizenumeraseregionsr+Opened %s successfully
Cannot write 0x%06x bytes at 0x%06x
Cannot read 0x%06x bytes at 0x%06x: %s
Error occurred when reading %s
%s: device does not support erasing. Please file a bug report at flashrom@flashrom.org
%s: mtd_numeraseregions must be 0
Invalid device number %s. Use flashrom -p linux_mtd:dev=N where N is a valid MTD
device number.
MTD device %d type is not "nor"
MTD erase size is not a power of 2
Non-uniform eraseblock size is unsupported.
%s: device_name: "%s", is_writeable: %d, numeraseregions: %lu, total_size: %lu, erasesize: %lu
Cannot open file stream for %s
get_mtd_infolinux_mtd_erase%s: invalid clock: %s kHz
Using device %s
%s: failed to open %s: %s
Using %ukHz clock
Cannot open %s: %s.
Cannot read %s: %s.
%s: max_kernel_buf_size: %zu
Using default %ukHz clock. Use 'spispeed' parameter to override.
No SPI device given. Use flashrom -p linux_spi:dev=/dev/spidevX.Y
%s: failed to set speed to %uHz: %s
%s: failed to set SPI mode to 0x%02x: %s
%s: failed to set the number of bits per SPI word to %u: %s
/sys/module/spidev/parameters/bufsizCannot read %s: file is empty.
Buffer size %ld from %s seems wrong.
%s: Using value from %s as max buffer size.
%s: Using page size as max buffer size.
linux_spi_send_commandlinux_spi_init3COM3C90xB: PCI 10BASE-T (TPO)3C90xB: PCI 10BASE-FL3C90xB: PCI 10BASE-FX3C905B: Cyclone 10/100/BNC3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T43C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO)3C90xB: PCI 10BASE-T/10BASE2 (TPC)3C905C: EtherLink 10/100 PCI (TX)3C980C: EtherLink Server 10/100 PCI (TX)Intel NIC flashIntel NIC control/status reg8255xER/82551IT Fast Ethernet Controller82557/8/9/0/1 Ethernet Pro 100Unsupported chip size 0x%x
Timeout reading heading byte
Timeout writing heading word
Timeout reading tail byte
Timeout writing Shadow RAM
Flash update failed
Enabling eeprom access failed.
Intel Gigabit NIC w/ SPI EEPROMController reports no EEPROM is present.
Intel i210 NIC w/ emulated EEPROM82580 Quad Gigabit Ethernet Controller (Copper)82580 Quad Gigabit Ethernet Controller (Fiber)82580 Quad Gigabit Ethernet Controller (Backplane)82580 Quad Gigabit Ethernet Controller (Ext. PHY)82580 Dual Gigabit Ethernet Controller (Copper)Unprogrammed 82580 Quad/Dual Gigabit Ethernet ControllerI210 Gigabit Network Connection UnprogrammedI211 Gigabit Network Connection UnprogrammedI210 Gigabit Network ConnectionI210 Gigabit Network Connection SERDES FiberI210 Gigabit Network Connection SERDES BackplaneI210 Gigabit Network Connection SGMIII211 Gigabit Network ConnectionEnabling flash write access failed.
Intel I210 Gigabit w/ SPI flashFlash is in Secure Mode. Abort.
Unable to clear Flash Access Error. Abort
Intel Gigabit NIC w/ SPI flashIntel 10 Gigabit NIC w/ SPI flash82571EB Gigabit Ethernet Controller82541GI Gigabit Ethernet Controller82541PI Gigabit Ethernet Controller82572EI Gigabit Ethernet Controller82574L Gigabit Ethernet Controller82599 10 Gigabit Unprogrammed Network Controller82599 10 Gigabit KX4 Dual Port Network Controller82599 10 Gigabit Dual Port Backplane Controller82599 10 Gigabit CX4 Dual Port Network Controller82599 10-Gigabit SFI/SFP+ Network Controller82599 10 Gigabit XAUI/BX4 Dual Port Network Controller82599 10 Gigabit KR Network Controller82599 10 Gigabit TN Network Controller82599 10 Gigabit Dual Port Network Controller with FCoE82599 10 Gigabit Dual Port Backplane Controller with FCoE82599 10 Gigabit SFI Network ControllerRealtekRTL8139/8139C/8139C+RTL8169SMC1211TXbprombioscproms3OGP registersOpen Graphics ProjectDevelopment Board OGD1Please use flashrom -p ogp_spi:rom=... to specify which flashchip you want to access.
Invalid or missing rom= parameter.

Total packetsize (%i) is greater than 64 supported, aborting.
Unexpected number of bytes transferred, expected %i, got %i!
Could not open device PICkit2!
Could not set USB device configuration.
Could not claim USB device interface
Command Get Firmware Version failed!
PICkit2 Firmware Version: %d.%d
Command Set SPI Speed failed!
Error: Invalid 'spispeed' value.
Send SPI failed!
Receive SPI failed
Command Shutdown failed!
millivoltCouldn't initialize libusb!
Setting voltage to %i mV.
Command Set Voltage failed!
Command Setup failed!
333kMicrochipPICkit 2¦óÏöúþô¦
óÏÿöùû��ÍÌÌÌÌÌü?@@ @@p?B@\Âõ(2@*@Pony SPI shutdown failed.
Pony SPI shutdown completed.
SI-Progserbangsi_progajaweAJAWeUsing %s programmer pinout.
Error: No valid device specified.
Use flashrom -p pony_spi:dev=/dev/device[,type=name]
Error: Missing argument for programmer type.
Error: Invalid programmer type specified.
No programmer compatible with %s detected.
stk200_shutdown
stk200_init
byteblaster_shutdown
byteblaster_preinit
dlc5_shutdown
dlc5_preinit
rayerRayeR SPIPGMiobaseUsing %s pinout.
xilinxbyteblastermvAltera ByteBlasterMVstk200Atmel STK200/300 adapterwigglerWiggler LPTspi_ttSPI Tiny Tools (SPI_TT LPT)Error: iobase= specified, but the I/O base given was invalid.
It must be a multiple of 0x4 and lie between 0x100 and 0xfffc.
Non-default I/O base requested. This will not change the hardware settings.
Using address 0x%x as I/O base for parallel port access.
Xilinx Parallel Cable III (DLC 5)Marvell 88SX7042 registersFlash Parameters:
TurnOff=0x%01x
Acc2First=0x%01x
Acc2Next=0x%01x
ALE2Wr=0x%01x
WrLow=0x%01x
WrHigh=0x%01x
Reserved[21:20]=0x%01x
TurnOffExt=0x%01x
Acc2FirstExt=0x%01x
Acc2NextExt=0x%01x
ALE2WrExt=0x%01x
WrLowExt=0x%01x
WrHighExt=0x%01x
Reserved[31:28]=0x%01x
Expansion ROM BAR Control:
ExpROMSz=0x%01x
Bar2En=0x%01x
BAR2TransAttr=0x%01x
BAR2Sz=0x%01x
GPIOPortMode=0x%01x
Activating I/O BAR at 0x%04x
Marvell88SX7042 PCI-e 4-port SATA-IIPCI BAR2 (Flash/NVRAM) Control:
Warning! Either the straps are incorrect or you have no flash or someone overwrote the strap values!
%s: control register stuck at %08x, ignoring.
Warning: Flash seems unconnected.
PCI0680 Ultra ATA-133 Host CtrlSiI 3112 [SATALink/SATARaid] SATA CtrlSiI 3114 [SATALink/SATARaid] SATA CtrlSiI 3512 [SATALink/SATARaid] SATA CtrlSATA SiI registersSilicon ImageSiI 3124 PCI-X SATA CtrlSiI 3132 SATA Raid II Ctrlsatasii_wait_doneError: cannot read from device (flushing stream)Error: NAK to a stream buffer operation
Error: Invalid reply 0x%02X from device
Warning: Automatic command availability check failed for cmd 0x%02x - won't execute cmd
Error: cannot malloc command buffer
serprog: Passing write-n bytes=%d addr=0x%x
serprog: Error: cannot write write-n command
serprog: Error: cannot write write-n dataError: cannot write op code: %s
Error: cannot write parameters: %s
Error: cannot read from device: %s
Error: invalid response 0x%02X from device (to command 0x%02X)
Error: cannot read return parameters: %s
Error: could not transfer write buffer
Error: could not execute command buffer
serprog: Executed operation buffer of %d bytes
%s addr=0x%lx returning 0x%02X
serprog: Error: cannot read read-n dataCould not flush command buffer.
serprog: Output drivers disabled
serprog: %s: Warning: could not disable output buffers
serprog: Warning: executed operation buffer due to size reasons
Error: could not execute command buffer before sending SPI commands.
Error: could not allocate SPI send param buffer.
No baudrate specified, using the hardware's defaults.
Error: Both host and device specified.
Please use either dev= or ip= but not both.
Error: No port specified.
Use flashrom -p serprog:ip=ipaddr:port
Error: serprog cannot open socket: %s
Error: serprog cannot connect: %s
Error: serprog cannot set socket options: %s
serprog: connected - attempting to synchronize
Error: cannot synchronize protocol - check communications and reset device?
Error: NAK to query interface version
Error: Unknown interface version: %d
serprog: Interface version ok.
Error: query command map not supported
Warning: NAK to query supported buses
serprog: Bus support: parallel=%s, LPC=%s, FWH=%s, SPI=%s
Error: SPI operation not supported while the bustype is SPI
serprog: Maximum write-n length is %d
serprog: Maximum read-n length is %d
Error: Could not convert 'spispeed'.
Error: Garbage following 'spispeed' value.
serprog: Warning: Setting the SPI clock rate is not supported!
serprog: Requested to set SPI clock frequency to %u Hz. It was actually set to %u Hz
serprog: Setting SPI clock rate to %u Hz failed!
Error: Initialize operation buffer not supported
Error: Write to opbuf: delay not supported
Error: Single byte read not supported
Error: Read n bytes not supported
Error: Write to opbuf: write byte not supported
serprog: Write-n not supportedError: cannot allocate memory for Write-n buffer
serprog: Maximum read-n length not reported
Warning: NAK to query programmer name
serprog: Programmer name is "%s"
Warning: NAK to query serial buffer size
serprog: Serial buffer size is %d
Error: Execute operation buffer not supported
Error: NAK to initialize operation buffer
Warning: NAK to query operation buffer size
serprog: operation buffer size is %d
Error: could not enable output buffers
serprog: Output drivers enabled
serprog: Warning: Programmer does not support toggling its output drivers
Error: No host specified.
Use flashrom -p serprog:ip=ipaddr:port
Error: Neither host nor device specified.
Use flashrom -p serprog:dev=/dev/device:baud or flashrom -p serprog:ip=ipaddr:port
Error: No device specified.
Use flashrom -p serprog:dev=/dev/device[:baud]
serprog_delay used, but programmer doesn't support delays natively - emulating
serprog: requested mapping %s is incompatible: 0x%zx bytes at 0x%0*lx.
Error: cannot write command
serprog: readb byteread%s: addr=0x%lx len=%zu
serprog: IP %s port %d
Error: cannot resolve %s
serprog: Synchronized
%s usecs=%d
serprog_delayserprog_shutdownserprog_spi_send_commandserprog_chip_writebserprog_chip_readbsp_do_read_nUSB-Blaster enable chip select failed
USB-Blaster disable chip select failed
Failed to open USB-Blaster: %s
USB-Blaster set latency timer failed
USB-Blaster set chunk size failed
USB-Blaster reset write failed
USB-Blaster reset read failed
writing %d-byte packet
USB-Blaster write failed
reading %d-byte packet
USB-Blaster read failed
USB-Blaster reset failed
AlteraUSB-BlasterFailed to issue the %s command: '%s'
Failed to get %s answer: '%s'
STLINK_BRIDGE_GET_RWCMD_STATUSFailed to set the NSS pin to low
Failed to issue the STLINK_BRIDGE_WRITE_SPI command: '%s'
Failed to send the  data after the  STLINK_BRIDGE_WRITE_SPI command: '%s'
Failed to issue the STLINK_BRIDGE_READ_SPI command: '%s'
Failed to retrive the STLINK_BRIDGE_READ_SPI answer: '%s'
Failed to set the NSS pin to high
Opening STLINK-V3 with serial: %s
No STLINK-V3 seems to be connected with serial %s
Could not find any connected STLINK-V3
The spispeed parameter passed with invalid format: %s
Please pass the parameter with a simple number in kHz
Connected to STLink V3 with bridge FW version: %d
Your STLink V3 has too old version of the bridge interface
Please update the firmware with the STSW-LINK007 which can be downloaded from here:
https://www.st.com/en/development-tools/stsw-link007.htmlFailed to calculate SPI clock prescalerSTLINK_BRIDGE_CLOSESTLINK_BRIDGE_CS_SPISPI read/write failure: %d
ST_GETVERSION_EXTFailed to query FW versionSTLINK_BRIDGE_GET_CLOCKSCK frequency set to %d kHz
STLINK_BRIDGE_INIT_SPISTMicroelectronicsSTLINK-V3Incomplete SPI bitbang master setting!
Please report a bug at flashrom@flashrom.org
Restoring MMIO space at %p
You need to be root.
ERROR: Could not get I/O privileges (%s).
page_size=%lx
/dev/mem/dev/mem mmap failed: %s
%s: Out of memory!
Could not lseek() MSR: %s
Could not read() MSR: %s
Could not write() MSR: %s
/dev/cpu/%d/msrMSR was already initialized
Error while opening %s: %s
Did you run 'modprobe msr'?
No MSR initialized.
pre-rounding:  start=0x%0*lx, len=0x%zx, end=0x%0*lx
post-rounding: start=0x%0*lx, len=0x%zx, end=0x%0*lx
Not mapping %s, zero size at 0x%0*lx.
Critical error: open(/dev/mem): %s
Error accessing %s, 0x%zx bytes at 0x%0*lx
In Linux this error can be caused by the CONFIG_NONPROMISC_DEVMEM (<2.6.27),
CONFIG_STRICT_DEVMEM (>=2.6.27) and CONFIG_X86_PAT kernel options.
Please check if either is enabled in your kernel before reporting a failure.
You can override CONFIG_X86_PAT at boot with the nopat kernel parameter but
disabling the other option unfortunately requires a kernel recompile. Sorry!
%s: Could not register shutdown function!
%s: tried to physunmap without valid data!
Trying to unmap a nonexisting mapping!
Please report a bug at flashrom@flashrom.org
undo_physmapphysmap_commonError: %sUsing custom baud rate.
Cannot open serial port: Serial port write error!
Empty write
Serial port is unresponsive!
Serial port read error!
Empty read
readcnt %u rd_bytes %u
read %zd bytes
Serial port read error: writecnt %u wr_bytes %u
wrote %zd bytes
Serial port write error: write successful
%s: File descriptor is invalid.
Could not fetch original serial port configuration: Could not set custom baudrate: Could not fetch serial port configuration: Warning: given baudrate %d rounded down to %d.
Using slowest possible baudrate: %d.
Could not set serial baud rate: Could not change serial port configuration: Could not fetch new serial port configuration: Some requested serial options did not stick, continuing anyway.
          observed    wanted
c_cflag:  0x%08lX  0x%08lX
c_lflag:  0x%08lX  0x%08lX
c_iflag:  0x%08lX  0x%08lX
c_oflag:  0x%08lX  0x%08lX
Could not set baud rates exactly.
Actual baud flags are: ispeed: 0x%08lX, ospeed: 0x%08lX
Could not get serial port mode: Could not set serial port mode to blocking: Could not set serial port mode to non-blocking: Could not restore serial port mode to blocking: Could not restore serial port blocking behavior: serialport_config
%KáÂ ¡Ê@B	
`ã %&
ÀÆ-àg5	=Ready:Busy:BE SUSPEND:BE RUN/FINISH:BE ERROR:BE OK:PROG ERR:PROG OK:VP ERR:VPP OK:PROG SUSPEND:PROG RUN/FINISH:WP|TBL#|WP#,ABORT:UNLOCK:%s: id1 0x%02x, id2 0x%02x, id1 parity violation, id1 is normal flash content, id2 is normal flash contentmaster lock is unlocked!
Unlock: Done!
At least one block is locked and lockdown is active!
block lock at %06x is %slocked!
probe_82802abReading the status register failed!
%s: addr=0x%x, page_size=%u, page_bits=%u -> at45db_addr=0x%x
Reading the %s register failed!
%s: error sending erase command!
%s: chip did not become ready again after sending the erase command!
%s: cannot erase partial pages: addr=%u, blocklen=%u
%s: tried to erase a sector beyond flash boundary: addr=%u, blocklen=%u, size=%u
Sending disable lockdown failed!
Chip status register is 0x%02x
Chip status register: Bit 7 / Ready is %sset
Chip status register: Bit 6 / Compare match is %sset
Chip status register: Density is %u Mb
Chip status register: Bit 1 / Protection is %sset
Chip status register: Bit 0 / "Power of 2" is %sset
%s: total size %i kB, page size %i B
%s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u
%s: error sending read command!
%s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u
%s: tried to erase beyond flash boundary: addr=%u, blocklen=%u, size=%u
%s: cannot erase partial sectors: addr=%u, blocklen=%u
%s: cannot write partial pages: start=%u, len=%u
%s: tried to write beyond flash boundary: start=%u, len=%u, size=%u
%s: error sending buffer write!
%s: filling the buffer failed!
%s: error sending buffer to main memory command!
%s: chip did not become ready again!
Status register: 0x%02x.
%s: number of sectors=%u
No Sector is %sed.
Sector 0a is %s%sed.
Sector 0b is %s%sed.
Sector %2u is %s%sed.
Disabling lockdown failed!
AT45DB321Clockprotect%s: unknown page size %d.
Writing page %u failed!
%s: committing page failed!
at45db_commit_buffer1at45db_fill_buffer1at45db_program_pagespi_write_at45dbspi_erase_at45cs_sectorspi_erase_at45db_chipspi_erase_at45db_sectorspi_erase_at45db_blockat45db_erasespi_erase_at45db_pagespi_read_at45db_e8at45db_convert_addrspi_read_at45dbprobe_spi_at45dbat45db_get_sector_count×=*%s: Retrying read with greater buffer length!
%s: Maximum buffer length reached and data still not ready!
%s: Block erase size is not page size!
%s: Timed out waiting for SPI not busy!
%s: Start address is not page-aligned!
%s: Length is not page-aligned!
%s: hwversion 0x%02x, ediid 0x%02x
%s: Unable to execute 8051!
%s: Unable to disable EDI!
%s: Unable to enable SPI!
%s: Unable to disable SPI!
%s: reading hwversion failed
%s: reading ediid failed
%s: Unable to reset 8051!
edi_chip_probeedi_shutdownedi_probe_kb9012edi_chip_readedi_chip_writeedi_readedi_chip_block_erase%s: id1 0x%04x, id2 0x%04x
probe_en29lv640b(Am29F002(N)BBAm29F002(N)BTAm29F010Am29F010A/BAm29F016DAm29F040Am29F040BAm29F080Am29F080BAm29LV001BBAm29LV001BTAm29LV002BBAm29LV002BTAm29LV004BBAm29LV004BTAm29LV008BBAm29LV008BTAm29LV040BAm29LV081BAMICA25L010A25L016A25L020A25L032A25L040A25L05PTA25L05PUA25L080A25L10PTA25L10PUA25L16PTA25L16PUA25L20PTA25L20PUA25L40PTA25L40PUA25L512A25L80PA25LQ032/A25LQ32AA25LQ16A25LQ64A29002BA29002TA29040BA49LF040AAtmelAT25DF021AT25DF021AAT25DF041AAT25DF081AT25DF081AAT25DF161AT25DF321AT25DF321AAT25DF641(A)AT25DL081AT25DL161AT25DQ161AT25F1024(A)AT25F2048AT25F4096AT25F512AT25F512AAT25F512BAT25FS010AT25FS040AT25SF041AT25SF081AT25SF161AT25SF321AT25SL128AAT26DF041AT26DF081AAT26DF161AT26DF161AAT26F004AT29C010AAT29C020AT29C040AAT29C512AT45CS1282AT45DB011DAT45DB021DAT45DB041DAT45DB081DAT45DB161DAT45DB321DAT45DB321EAT45DB642DAT49(H)F010AT49BV512AT49F002(N)AT49F002(N)TAT49F020AT49F040AT49F080AT49F080TAT49LH002AT49LH004AT49LH00B4BrightBM29F040CatalystCAT28F512KB9012 (EDI)ESIES25P16ES25P40ES25P80ESMTF25L008AF25L32PAF49B002UAEonEN25B05EN25B05TEN25B10EN25B10TEN25B16EN25B16TEN25B20EN25B20TEN25B32EN25B32TEN25B40EN25B40TEN25B64EN25B64TEN25B80EN25B80TEN25F05EN25F10EN25F16EN25F20EN25F32EN25F40EN25F64EN25F80EN25P05EN25P10EN25P16EN25P20EN25P32EN25P40EN25P64EN25P80EN25Q128EN25Q16EN25Q32(A/B)EN25Q40EN25Q64EN25Q80(A)EN25QH128EN25QH16EN25QH32EN25QH64EN25S10EN25S16EN25S20EN25S32EN25S40EN25S64EN25S80EN29F002(A)(N)BEN29F002(A)(N)TEN29F010EN29GL064(A)BEN29GL064(A)TEN29GL064H/LEN29GL128EN29LV040(A)EN29LV640BMBM29F004BCMBM29F004TCMBM29F400BCMBM29F400TCMBM29LV160BEMBM29LV160TEGigaDeviceGD25B128B/GD25Q128BGD25LQ128C/GD25LQ128DGD25LQ16GD25LQ32GD25LQ40GD25LQ64(B)GD25LQ80GD25Q10GD25Q127C/GD25Q128CGD25Q16(B)GD25Q20(B)GD25Q256DGD25Q32(B)GD25Q40(B)GD25Q512GD25Q64(B)GD25Q80(B)GD25T80GD25VQ16CGD25VQ21BGD25VQ40CGD25VQ41BGD25VQ80CHyundaiHY29F002BHY29F002THY29F040AISSIIS25LP064IS25LP128IS25LP256IS25WP032IS25WP064IS25WP128IS25WP256IS29GL064BIS29GL064H/LIS29GL064TIS29GL128H/L25F160S33B825F160S33T825F320S33B825F320S33T825F640S33B825F640S33T828F001BN/BX-B28F001BN/BX-T28F002BC/BL/BV/BX-T28F004B5/BE/BV/BX-B28F004B5/BE/BV/BX-T28F008S3/S5/SC28F400BV/BX/CE/CV-B28F400BV/BX/CE/CV-T82802AB82802ACMacronixMX23L12854MX23L1654MX23L3254MX23L6454MX25L1005(C)/MX25L1006EMX25L12805DMX25L1605MX25L1635DMX25L1635EMX25L2005(C)/MX25L2006EMX25L25635F/MX25L25645GMX25L3205(A)MX25L3205D/MX25L3208DMX25L3206E/MX25L3208EMX25L3235DMX25L3273EMX25L4005(A/C)/MX25L4006EMX25L512(E)/MX25V512(C)MX25L6405MX25L6405DMX25L6406E/MX25L6408EMX25L6495FMX25R6435FMX25U12835FMX25U1635EMX25U25635FMX25U3235E/FMX25U51245GMX25U6435E/FMX25U8032EMX29F001BMX29F001TMX29F002(N)BMX29F002(N)TMX29F022(N)BMX29F022(N)TMX29F040MX29GL128FMX29GL320EBMX29GL320EH/LMX29GL320ETMX29GL640EBMX29GL640EH/LMX29GL640ETMX29LV040MX66L51235F/MX25L51245GMicron/Numonyx/STM25P05M25P05-AM25P10M25P10-AM25P128M25P16M25P20M25P20-oldM25P32M25P40M25P40-oldM25P64M25P80M25PE10M25PE16M25PE20M25PE40M25PE80M25PX16M25PX32M25PX64M25PX80M45PE10M45PE16M45PE20M45PE40M45PE80N25Q00A..1GN25Q00A..3GN25Q016N25Q032..1EN25Q032..3EN25Q064..1EN25Q064..3EN25Q128..1EN25Q128..3EN25Q256..1EN25Q256..3EN25Q512..1GN25Q512..3GMicronMT25QL01GMT25QU01GMT25QL02GMT25QU02GMT25QU128MT25QL128MT25QL256MT25QU256MT25QL512MT25QU512V29C51000BV29C51000TV29C51400BV29C51400TV29LC51000V29LC51001V29LC51002NantronicsPMCPm25LD010(C)Pm25LD020(C)Pm25LD040(C)Pm25LD256CPm25LD512(C)Pm25LQ016Pm25LQ020Pm25LQ032CPm25LQ040Pm25LQ080Pm25LV010Pm25LV010APm25LV016BPm25LV020Pm25LV040Pm25LV080BPm25LV512(A)Pm29F002BPm29F002TPm39LV010Pm39LV020Pm39LV040Pm39LV512Pm49FL002Pm49FL004SSTSST25LF020ASST25LF040ASST25LF080(A)SST25VF010(A)SST25VF016BSST25VF020SST25VF020BSST25VF040SST25VF040BSST25VF040B.REMSSST25VF064CSST25VF080BSST25VF512(A)SST25WF010SST25WF020SST25WF020ASST25WF040SST25WF040BSST25WF080SST25WF080BSST25WF512SST26VF016B(A)SST26VF032B(A)SST26VF064B(A)SST28SF040ASST29EE010SST29EE020ASST29LE010SST29LE020SST39SF010ASST39SF020ASST39SF040SST39SF512SST39VF010SST39VF020SST39VF040SST39VF080SST39VF512SST49LF002A/BSST49LF003A/BSST49LF004A/BSST49LF004CSST49LF008ASST49LF008CSST49LF016CSST49LF020SST49LF020ASST49LF040SST49LF040BSST49LF080ASST49LF160CM29F002BM29F002T/NTM29F040BM29F400BBM29F400BTM29W010BM29W040BM29W512BM50FLW040AM50FLW040BM50FLW080AM50FLW080BM50FW002M50FW016M50FW040M50FW080M50LPW080M50LPW116M95M02SanyoLE25FU106BLE25FU206LE25FU206ALE25FU406BLE25FU406C/LE25U40CMCLE25FW106LE25FW203ALE25FW403ALE25FW406ALE25FW418ALE25FW806LE25FW808SharpLH28F008BJT-BTLZ1LHF00L04SpansionS25FL004AS25FL008AS25FL016AS25FL032A/PS25FL064A/PS25FL116K/S25FL216KS25FL127S-256kBS25FL127S-64kBS25FL128P......0S25FL128P......1S25FL128S......0S25FL128S......1S25FL129P......0S25FL129P......1S25FL132KS25FL164KS25FL204KS25FL208KS25FL256S......0S25FL512SSyncMOS/MoselVitelic{F,S,V}29C51001B{F,S,V}29C51001T{F,S,V}29C51002B{F,S,V}29C51002T{F,S,V}29C51004B{F,S,V}29C51004T{S,V}29C31004B{S,V}29C31004TTMS29F002RBTMS29F002RTWinbondW25P16W25P32W25P80W25Q128.VW25Q128.V..MW25Q128.WW25Q128.JW.DTRW25Q16.VW25Q16.WW25Q20.WW25Q256.VW25Q256JV_MW25Q32.VW25Q32.WW25Q40.VW25Q40BWW25Q40EWW25Q64.VW25Q64.WW25Q80.VW25Q80BWW25Q80EWW25X10W25X16W25X20W25X32W25X40W25X64W25X80W29C020(C)/W29C022W29C040/PW29C512A/W29EE512W29GL032CBW29GL032CH/LW29GL032CTW29GL064CBW29GL064CH/LW29GL064CTW29GL128CW39F010W39L010W39L020W39L040W39V040AW39V040BW39V040CW39V040FAW39V040FBW39V040FCW39V080AW39V080FAW39V080FA (dual mode)W49F002U/NW49F020W49V002AW49V002FAZetta DeviceZD25D20ZD25D40SFDP-capable chipProgrammerOpaque flash chipunknown AMIC SPI chipunknown Atmel SPI chipunknown Eon SPI chipunknown Macronix SPI chipunknown PMC SPI chipunknown SST SPI chipunknown ST SPI chipunknown Sanyo SPI chipGenericunknown SPI chip (RDID)unknown SPI chip (REMS)MX25L12835F/MX25L12845E/MX25L12865EMX25L1605A/MX25L1606E/MX25L1608EMX25L1605D/MX25L1608D/MX25L1673EMX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E/MX25L6473FMX25L8005/MX25L8006E/MX25L8008E/MX25V8005W29C010(M)/W29C011A/W29EE011/W29EE012W29C010(M)/W29C011A/W29EE011/W29EE012-oldunknown Winbond (ex Nexcom) SPI chipFAILED at 0x%08x! Expected=0x%02x, Found=0x%02x, failed byte count from 0x%08x-0x%08x: 0x%x
%s: Unsupported granularity! Please report a bug at flashrom@flashrom.org
Your flash chip is in an unknown state.
Get help on IRC at chat.freenode.net (channel #flashrom) or
mail flashrom@flashrom.org with the subject "FAILED: <your board name>"!
-------------------------------------------------------------------------------
DO NOT REBOOT OR POWEROFF!
Please report this on IRC at chat.freenode.net (channel #flashrom) or
mail flashrom@flashrom.org, thanks!
Erasing and writing flash chip... Looking for another erase function.
eraseblock layout is known, but matching block erase function is not implemented. block erase function found, but eraseblock layout is not defined. Reading current flash chip contents... Can't read anymore! Aborting.

Warning: Chip content is identical to the requested image.
No usable erase functions left.
Tried to register more than %i shutdown functions.
Tried to register a shutdown function before programmer init.
Invalid programmer specified!
Unhandled programmer parameters (possibly due to another failure): %s
Unhandled programmer parameters: %s
%s: mapping %s from 0x%0*lx to 0x%0*lx
%s: empty needle! Please report a bug at flashrom@flashrom.org
ERROR: flashrom has no read function for this flash chip.
Error: %s called with start 0x%x + len 0x%x > total_size 0x%x
Verification impossible because read failed at 0x%x (len 0x%x)
Chip size %u kB is bigger than supported size %u kB of chipset/board/programmer for %s interface, probe/read/erase/write may fail. Could not map flash chip %s at 0x%0*lx.
Could not map flash chip registers %s at 0x%0*lx.
failed! flashrom has no probe function for this flash chip.
===
SFDP has autodetected a flash chip which is not natively supported by flashrom yet.
The standard operations read and verify should work, but to support erase, write and all other possible featuresAll standard operations (read, verify, erase and write) should work, but to support all possible features we need to add them manually.
You can help us by mailing us the output of the following command to flashrom@flashrom.org:
'flashrom -VV [plus the -p/--programmer parameter]'
Thanks for your help!
===
%s %s flash chip "%s" (%d kB, %s) mapped at physical address 0x%0*lx.
Error: opening file "%s" failed: %s
Error: getting metadata of file "%s" failed: %s
Error: Image size (%jd B) doesn't match the flash chip's size (%lu B)!
Error: Failed to read complete file. Got %ld bytes, wanted %ld!
Error: file %s could not be written completely.
Error: flushing file "%s" failed: %s
Error: fsyncing file "%s" failed: %s
Error: closing file "%s" failed: %s
No read function available for this flash chip.
flashrom is free software, get the source code at https://flashrom.org
All programmers need a valid name, but the one with index %d does not!
Programmer %s has neither a device list nor a textual description!
Programmer %s does not have a valid type set!
Programmer %s does not have a valid init function!
Programmer %s does not have a valid delay function!
Programmer %s does not have a valid map_flash_region function!
Programmer %s does not have a valid unmap_flash_region function!
Flashchips table miscompilation!
ERROR: Some field of flash chip #%d (%s) is misconfigured.
Please report a bug at flashrom@flashrom.org
ERROR: Flash chip %s erase function %i region %i has size 0. Please report a bug at flashrom@flashrom.org
ERROR: Flash chip %s erase function %i region %i has count 0. Please report a bug at flashrom@flashrom.org
Strange: Empty eraseblock definition with non-empty erase function. Not an error.
ERROR: Flash chip %s erase function %i region walking resulted in 0x%06x bytes total, expected 0x%06x bytes. Please report a bug at flashrom@flashrom.org
ERROR: Flash chip %s erase function %i and %i are identical. Please report a bug at flashrom@flashrom.org
Write/erase is not working yet on your programmer in its current configuration.
Read is not working on this chip. flashrom has no read function for this flash chip.
Erase is not possible on this chip.
Erase is not working on this chip. flashrom has no erase function for this flash chip.
Write is not possible on this chip.
Write is not working on this chip. flashrom has no write function for this flash chip.
Requested regions can not be handled. Aborting.
Programmer doesn't support this chip. Aborting.
Failed to set correct 4BA mode! Aborting.
Proceeding anyway because user forced us to.
Aborting. You can override this with -p internal:boardmismatch=force.
Assuming old flash chip contents as ref-file...
Reading old flash chip contents... Checking if anything has changed.
Good, writing to the flash chip apparently didn't do anything.
This means we have to add special support for your board, programmer or flash
chip. Please report this on IRC at chat.freenode.net (channel #flashrom) or
mail flashrom@flashrom.org, thanks!
-------------------------------------------------------------------------------
You may now reboot or simply leave the machine running.
Please check the connections (especially those to write protection pins) between
the programmer and the flash chip. If you think the error is caused by flashrom
please report this on IRC at chat.freenode.net (channel #flashrom) or
mail flashrom@flashrom.org, thanks!
Apparently at least some data has changed.
Dummy device, does nothing and logs all accesses
All programmer devices speaking the serprog protocol
Dangerous Prototypes Bus Pirate
RayeR parallel port programmer
Programmers compatible with SI-Prog, serbang or AJAWe
 on %s %s (%s)Trying erase function %zi... not defined. 0x%06x-0x%06x:done. Erase/write done.
Initializing %s programmer
%s: unmapped 0x%0*lx
Could not allocate memory!
Can't read! Aborting.
ERASE FAILED!
Parallelflash chip registersNon-SPI, Parallel, LPC, FWH, Programmer-specific, None, AssumingFoundProbing for %s %s, %d kB: complete flashFailed to probe chip: %s
on %s.
rbNo filename specified.
wbFAILEDdoneReading flash... Memory allocation failed!
FAILED.
Read operation failed!
internal(flashrom was built with3.6.4 libpci %s, GCC9.2.1 20200304 little endianflashrom %sunnamedUh oh. Erase/write failed. Can't even read anymore!
Verifying flash... VERIFIED.
dummynic3comnicrealtekgfxnvidiadrkaisersatasiiataviait8212ft2232_spiserprogbuspirate_spidediprogdeveloperboxrayer_spipony_spinicintelnicintel_spinicintel_eepromogp_spisatamvlinux_mtdDevice files /dev/mtd*
linux_spiDevice files /dev/spidev*.*
usbblaster_spipickit2_spich341a_spidigilent_spistlinkv3_spiHÀýÿ`ÀýÿÀýÿÐÀýÿàÀýÿÀýÿ Àýÿ°ÀýÿÀÀýÿBÀýÿ get_next_writeneed_eraseverify_rangeextract_paramprogrammer_unmap_flash_regionprogrammer_map_flash_regionv1.2fmap size exceeds buffer boundary.
Unable to find fmap in provided buffer.
Cannot read %d bytes at offset %zu
Cannot read %zu bytes at offset %06zx
fmap signature found at %zu but header is invalid.
Binary search failed, trying linear search...
Found fmap at offset 0x%06zx
Out of memory.
fmap found at offset 0x%06zx
Failed to realloc.
Cannot read ROM contents.
disconnectedIntel PHY is %s.
4x1 Ports %d-%d (x1)unusedBES=0x%x, WG=%d, WSR=%d, WEWS=%d, EO=0x%x, VCL=%dUnknown ICHAssuming chipset '%s'.
=== Content Section ===
FLVALSIG 0x%08x
FLMAP0   0x%08x
FLMAP1   0x%08x
FLMAP2   0x%08x
--- Details ---
Component 2 is not used.
Fast Read is %ssupported.
No forbidden opcodes.
=== Component Section ===
FLCOMP   0x%08x
FLILL    0x%08x
FLILL1   0x%08x
Descr.=== Region Section ===
FLREG%zd   0x%08x
Region %d (%-7s) is unused.
0x%08x - 0x%08x
=== Master Section ===
FLMSTR%zd  0x%08x
%-4sDEIE ME   BIOS FD  Reg15Reg14Reg13OpROM10GbE IE   DE2  BMC  Reg7 DE   Pltf GbE   %c%c  TXE   %c%c SMLink pinsSMBus pinsSPI Chip Selectintegrated LANPCI ExpressSMBusNot iSMLinkAdvanced TCOLegacy/Compatible100 kHzLAN_PHY_PWR_CTRLgeneral purpose outputROM, then PCHHOT#SML1ALERT#SoftstrapsPCH onlythe CPU, PCH and DIMMsSLP_LAN#Buffered ThroughFull Integrated=== Softstraps ===
STRP%-2d = 0x%08x
--- MCH details ---
ME B is %sabled.
--- ICH details ---
ME SMBus Address 1: 0x%02x
ME SMBus Address 2: 0x%02x
SPI CS1 is used for %s.
GPIO12 is used as %s.
PCIe Port 6 is used for %s.
TCO is in %s Mode.
ME A is %sabled.
--- PCH ---
SMLink0 segment is %sabled.
SMLink1 segment is %sabled.
SMLink1 Frequency: %s
Intel ME SMBus Frequency: %s
SMLink0 Frequency: %s
Default PHY PCIe Port is %d.
t209 min Timing: %d ms
LinkSec is %sabled.
GPIO74 is used as %s.
GPIO29 is used as %s.
=== Upper Map Section ===
FLUMAP1  0x%08x
VTL (length in DWORDS) = %d
VSCC Table: %d entries
  JID%d  = 0x%08x
  VSCC%d = 0x%08x
300 series Cannon Point100 series Sunrise Point9 series Wildcat Pointpdreg5bios2reg7reg9ie10gbereg12reg13reg14reg15GPIO12GLAN_DOCK# (Native Input)invalid configurationPlatf.DevExp20 MHz50 MHz48 MHz30 MHz40 MHz25 MHz14 MHz / 17 MHz512 kB1 MB8 MB16 MB32 MB64 MBICH85 series Ibex Peak6 series Cougar Point7 series Panther Point8 series Lynx PointBaytrail8 series Lynx Point LP8 series Wellsburg9 series Wildcat Point LPC620 series LewisburgGbE MAC SMBus address is %sabled.
GbE MAC SMBus address: 0x%02x
GbE PHY SMBus address: 0x%02x
Intel ME SMBus Subsystem Vendor ID: 0x%04x
Intel ME SMBus Subsystem Device ID: 0x%04x
PCI Express Port Configuration Strap %d: 1x2, 2x1 Port %d (x2), Port %d (disabled), Ports %d, %d (x1)2x2 Port %d (x2), Port %d (x2), Ports %d, %d (disabled)1x4 Port %d (x4), Ports %d-%d (disabled)SMLink1 GP Address is %sabled.
SMLink1 controller General Purpose Target address: 0x%02x
SMLink1 I2C Target address is %sabled.
SMLink1 I2C Target address: 0x%02x
NR          (Number of Regions):                 %5zd
FRBA        (Flash Region Base Address):         0x%03x
NC          (Number of Components):              %5d
FCBA        (Flash Component Base Address):      0x%03x
ISL         (ICH/PCH/SoC Strap Length):          %5d
FISBA/FPSBA (Flash ICH/PCH/SoC Strap Base Addr): 0x%03x
NM          (Number of Masters):                 %5zd
FMBA        (Flash Master Base Address):         0x%03x
MSL/PSL     (MCH/PROC Strap Length):             %5d
FMSBA       (Flash MCH/PROC Strap Base Address): 0x%03x
Component 1 density:            %s
Component 2 density:            %s
Read Clock Frequency:           %s
Read ID and Status Clock Freq.: %s
Write and Erase Clock Freq.:    %s
Fast Read Clock Frequency:      %s
Dual Output Fast Read Support:  %sabled
Invalid instruction 0:          0x%02x
Invalid instruction 1:          0x%02x
Invalid instruction 2:          0x%02x
Invalid instruction 3:          0x%02x
Invalid instruction 4:          0x%02x
Invalid instruction 5:          0x%02x
Invalid instruction 6:          0x%02x
Invalid instruction 7:          0x%02x
%s: number of regions too high (%d).
%s: number of masters too high (%d).
      FD  BIOS  ME  GbE  Pltf Reg5 Reg6 Reg7  EC  Reg9 RegA RegB RegC RegD RegE RegF
%s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s
       FD   IFWI  TXE   n/a  Platf DevExp
      Descr. BIOS ME GbE Platf.
BIOS    %c%c    %c%c  %c%c  %c%c   %c%c
ME      %c%c    %c%c  %c%c  %c%c   %c%c
GbE     %c%c    %c%c  %c%c  %c%c   %c%c
LAN PHY Power Control FunctionMSL (%u) is greater than the current maximum of %u entries.
Only the first %u entries will be printed.
--- North/MCH/PROC (%d entries) ---
ISL (%u) is greater than the current maximum of %u entries.
--- South/ICH/PCH (%d entries) ---
Detailed North/MCH/PROC information is probably not reliable, printing anyway.
Detailed South/ICH/PCH information is probably not reliable, printing anyway.
ME SMBus Controller is connected to the %s.
%sn BMC Mode: Intel AMT SMBus Controller 1 is connected to %s.
Chipset configuration Softstrap 2: %d
Intel ME SMBus Select is %sabled.
Chipset configuration Softstrap 1: %d
DMI RequesterID Checks are %sabled.
BIOS Boot-Block size (BBBS): %d kB.
Chipset configuration Softstrap 3: 0x%x
ME SMBus ASD address is %sabled.
ME SMBus Controller ASD Target address: 0x%02x
ME SMBus I2C address is %sabled.
ME SMBus I2C target address: 0x%02x
PCIe Lane Reversal 1: PCIe Lanes 0-3 are %sreserved.
PCIe Lane Reversal 2: PCIe Lanes 4-7 are %sreserved.
DMI Lane Reversal: DMI Lanes 0-3 are %sreserved.
Integrated MAC/PHY communication over PCIe is %sabled.
Management Engine will boot from %sflash.
Chipset configuration Softstrap 5: %d
Virtualization Engine Enable 1 is %sabled.
ME Memory-attached Debug Display Device is %sabled.
ME Memory-attached Debug Display Device address: 0x%02x
Chipset configuration Softstrap 7: %d
Integrated Clocking Configuration is %d.
PCH Signal CL_RST1# does %sassert when Intel ME performs a reset.
Virtualization Engine Enable 2 is %sabled.
Virtualization Engine will boot from %sflash.
Braidwood SSD functionality is %sabled.
Braidwood NVMHCI functionality is %sabled.
Chipset configuration Softstrap 6: %d
Integrated wired LAN Solution is %sabled.
Chipset configuration Softstrap 2: 0x%x
ME SMBus MCTP Address is %sabled.
ME SMBus MCTP target address: 0x%02x
ME Debug status writes over SMBUS are %sabled.
ME Debug SMBus Emergency Mode address: 0x%02x (raw)
PCIe ports Subtractive Decode Agent is %sabled.
ME Debug SMBus Emergency Mode is %sabled.
ME Debug SMBus Emergency Mode Address: 0x%02x
Integrated Clocking Configuration used: %d
ICC Profile is selected by %s.
Deep SX is %ssupported on the platform.
ME Debug LAN Emergency Mode is %sabled.
Integrated wired LAN is %sabled.
SMLink1 provides temperature from %s.
Integrated Clock: %s Clock Mode
The meaning of the descriptor straps are unknown yet.

VTBA (base address)    = 0x%6.6x
Manufacturer ID 0x%02x, Device ID 0x%04x
Peculiar firmware descriptor, assuming Apollo Lake compatibility.
Peculiar firmware descriptor, assuming Ibex Peak compatibility.
Peculiar firmware descriptor, assuming Wildcat Point compatibility.
Unknown firmware descriptor, assuming 300 series compatibility.

The firmware descriptor looks like a Skylake/Sunrise Point descriptor.
However, the read frequency isn't set to 17MHz (the only valid value).
Please report this message, the output of `ich_descriptors_tool` for
your descriptor and the output of `lspci -nn` to flashrom@flashrom.org


The firmware descriptor has the read frequency set to 17MHz. However,
it doesn't look like a Skylake/Sunrise Point compatible descriptor.
Please report this message, the output of `ich_descriptors_tool` for
your descriptor and the output of `lspci -nn` to flashrom@flashrom.org

Only ICH SPI component index 0 or 1 are supported yet.
Density encoding is unknown on this chipset.
Density of ICH SPI component with index %d is invalid.
Encoded density is 0x%x while maximum allowed is 0x%x.
Reading flash descriptors mapped by the chipset via FDOC/FDOD...%s: number of regions too high (%d) - failed
%s: number of masters too high (%d) - failed
LAN PHY Power Control Function (Native Output)pÎýÿ ÎýÿpÎýÿpÎýÿpÎýÿpÎýÿÎýÿ`Îýÿ`ÎýÿÎýÿread_ich_descriptors_via_fdod2prettyprint_ich_descriptor_masterprettyprint_ich_descriptor_region%s: excessive loops, i=0x%x
Full Access.
Write Lock (Default State).
Write Lock, Locked Down.
Read Lock.
Read/Write Lock.
Read Lock, Locked Down.
Enabled lockdown at 0x%0*lx.
%s called with unknown mask
, man_id parity violationretrying.
 page 0x%lx failed!
Lock status of block at 0x%0*lx is Locked Open (Full Access, Locked Down).
Read/Write Lock, Locked Down.
Lock bits at 0x%0*lx not changed.
Changing lock bits failed at 0x%0*lx! New value: 0x%02x.
Changed lock bits at 0x%0*lx to 0x%02x.
Enabling lockdown FAILED at 0x%0*lx! New value: 0x%02x.
%s: man_id 0x%02x, dev_id 0x%06x, man_id seems to be normal flash content, dev_id seems to be normal flash content writing sector at 0x%lx failed!
%s called with incorrect arguments
Chip lacks correct probe timing information, using default 10ms/40us. Chip has negative value in probe_timing, failing without chip access
ûýÿHúýÿhúýÿúýÿ¨úýÿÈúýÿèúýÿ(úýÿprobe_jedec_commonerase_chip_block_jedecgetaddrmaskprobe_jedec_29gldata_polling_jedectoggle_ready_jedec_common%255s %255s
<NULL> is a bad region name.
Duplicate region name: "%s".
Could not allocate memoryLooking for region "%s"... Using region%s: "%s"%sERROR: Could not open ROM layout (%s).
Maximum number of ROM images (%i) in layout file reached.
Error parsing layout file. Offending string: "%s"
Error adding layout entry: %s
romlayout %08x - %08x named %s
Warning: Address range of region "%s" exceeds the current chip's address space.
Error: Size of the address range of region "%s" is not positive.
Region requested (with -i "%s"), but no layout data is available.
Invalid region specified: "%s".
Cannot add fmap entries to layout - Too many entries.
Error: Unknown programmer "%s". Valid choices are:
Couldn't parse the descriptor!
Attempting to read fmap from ROM content.
Failed to read fmap from ROM.
Adding fmap layout to global layout.
Failed to add fmap regions to layout.
Attempting to read fmap from buffer.
Failed to read fmap from buffer.
fmap %08x - %08x named %s
Memory allocation error!
Reading ich descriptor... Descriptors don't match!
%s called with incomplete master definition. Please report a bug at flashrom@flashrom.org
register_opaque_master%d known %s (good: %d, untested: %d, bad: %d):


Supported %s devices for the %s programmer:
Supported flash chips (total: %d):

(P = PROBE, R = READ, E = ERASE, W = WRITE, - = N/A)


Supported devices for the %s programmer:

Supported chipsets (total: %u):


Supported devices for the %s programmer:

%s: %s: Uninitialized programmer type! Please report a bug at flashrom@flashrom.org
270-WS-W555-A2 (Classified SR-2)MS-9830 (IM-945GSE-A, A9830IMS)Fusion-ITX WiFi (FUSION350-A-E)nForce 630i Supreme (N73U-Supreme)VendorBoardStatus  Required value for
-p internal:mainboard=
OK      NT      DEP     N/A     BAD     (autodetected)%s:%sUntestedOKNot workingConfig-dependentN/A %s IDs    Status
 %04x:%04x  %s
TestKnown Size TypeVoltageOK  Broken[kB] range [V]
Supported programmers:
-%6dno info%0.02f;%0.02fChipsetPCI IDs    Status

mainboardsmobile devicesUSBAcerAspire 1520Aspire OneEee PC 701 4GClevoP150HMInspiron 1420Latitude CPi A366XTVostro 3700Latitude E6520HP/CompaqEliteBook 8560pnx9005nx9010ThinkPad T40pThinkPad T410sThinkPad T420ThinkPad X1ThinkPad 2403000 V100 TF05CxxTeclastX98 Air 3GA-TrendATC-6220A-S78HAX8BX6 2.0Fatal1ty F-I90HDIS-10NF-M2SV75-MEM61SM/EM61PM6M810CADLINKExpress-HRAdvantechPCM-5820AlienwareAurora-R2UK79G-1394vKM400Am-SASIMB-5BLMP4CoreDual-VSTA775Dual-VSTA880G Pro3890GX Extreme3939A785GMH/128M960GM-GS3 FXA330GCA770CrossFireA780FullHDALiveNF6G-DVIAM2NF6G-VSTAAMCP7AION-HTE350M1/USB3Fatal1ty 970 PerformanceFatal1ty Z77 PerformanceG31M-GSG31M-S rev 2.0G41M-VS3H61M-ITXH67MIMB-180-HK7VT4A+K8S8XM3A790GXH/128MN61P-SN68C-S UCCP4i65GZ68 Extreme4A7N8X DeluxeA7N8X-E DeluxeA7V133A7V400-MXA8N-EA8N-SLIA8N-SLI DeluxeA8N-SLI PremiumA8N-VMA8NE-FM/SA8V DeluxeA8V-E DeluxeA8V-E SEC60M1-ICrosshair II FormulaCrosshair IV ExtremeE35M1-I DELUXEF1A75-V PROF2A85-MK8NK8VK8V SE DeluxeK8V-XK8V-X SEKFSN4-DRE/SASM2A-MXM2A-VM (HDMI)M2N32-SLI DeluxeM2N68-VMM2N-EM2N-E SLIM2N-MX SE PlusM2NPV-VMM2N-SLI DeluxeM2VM3AM3A76-CMM3A78-EHM3A78-EMM3N78 PROM3N78-VMM3N-H/HDMIM4A785TD-M EVOM4A785TD-V EVOM4A785T-MM4A78-EMM4A78LT-M LEM4A79T DeluxeM4A87TD/USB3M4A89GTD PROM4N68T V2M4N78 PROM4N78 SEM5A78L-M LXM5A97 (rev. 1.0)M5A99X EVOMaximus IV ExtremeMEW-AMMEW-VMP2BP2B-DP2B-DSP2B-FP2B-LSP2E-MP2L97-SP3B-FP4S533-XP5BP5B-DeluxeP5B-VMP5BV-MP5GC-MX/1333P5K SEP5K-VP5K-VMP5KCP5KPL-AM IN/GBP5KPL-CMP5KPL-VMP5L-MXP5L-VM 1394P5LP-LEP5N32-E SLIP5N7A-VMP5QPL-AMP5VD1-XP5VD2-MXP6T SEP6T DeluxeP6T Deluxe V2P7H57D-V EVOP7H55-M LXP8B-E/4LP8B WSP8B75-M LEP8H61 PROP8H61-M LE/USB3P8H67-M PROP8H77-IP8H77-MP8H77-V LEP8P67 (rev. 3.1)P8P67 LE (B2)P8P67 LE (B3)P8P67 PRO (rev. 3.0)P8P67-M PROP8Z68-VP8Z68-V LEP8Z68-V PROP8Z68-V PRO/GEN3RAMPAGE III GENESABERTOOTH 990FXSABERTOOTH 990FX R2.0Z8NA-D6CZ8PE-D12AttroG5G100-PBachmannOT200BCOMWinNET100BifferosBifferboardH61MGCH61MU3M6TBAM7NCD ProN61PB-M2SN68S3+P4M80-M4TA780G M2+TA790GX A3+BoserHS-6637Congatecconga-X852Inspiron 580OptiPlex 7010PowerEdge C6220Vostro 460855GME-MGFBlood-Iron P35 T2RL848P-A7GeForce6100PM-M2 (V3.0)GeForce7050M-M (V2.0)GF7050VT-MGF7100PVT-M3 (V1.0)GF8200AK7S5AK7S6AK7SEM (V1.0A)P4M800PRO-M (V1.0A, V2.0)P4VXMS (V1.0A)P6BAP-A+ (V2.2)P6IWP-FeP6VAP-A+RS485M-MEmersonATCA-7360EP-3PTAEVGA122-CK-NF68132-CK-NF78VA-502A6VMXP4M800P7MA-RS2P55MXQ45MFreetechP6F91iD2724-A1xD3041-A1xFujitsu-SiemensCELSIUS W410ESPRIMO P5915GA-2761GXDKGA-6BXCGA-6BXDUGA-6VXE7+GA-6ZMAGA-770TA-UD3GA-7DXRGA-7VT600GA-880GMA-USB3 (rev. 3.1)GA-8I945GZME-RHGA-8S648GA-945GCM-S2 (rev. 3.0)GA-945GM-S2GA-945PL-S3P (rev. 6.6)GA-965GM-S2 (rev. 2.0)GA-965P-DS4GA-965P-S3 (rev. 1.0)GA-970A-D3P (rev. 1.0)GA-970A-UD3P (rev. 2.0)GA-990FXA-UD3 (rev. 4.0)GA-A75M-UD2HGA-B85M-D3HGA-EG43M-S2HGA-EP31-DS3L (rev. 1.0, 2.1)GA-EP35-DS3LGA-EX58-UD4PGA-G33M-S2GA-G33M-S2LGA-G41MT-S2PTGA-H55M-S2GA-H61M-D2-B3GA-H61M-D2H-USB3GA-H77-D3HGA-H77-DS3H (rev. 1.1)GA-H77M-D3HGA-J1900N-D3VGA-M56S-S3GA-M57SLI-S4GA-M61P-S3GA-M720-US3GA-MA69VM-S2GA-MA74GM-S2H (rev. 3.0)GA-MA770-UD3 (rev. 2.1)GA-MA770T-UD3PGA-MA780G-UD3HGA-MA785GMT-UD2H (rev. 1.0)GA-MA78G-DS3H (rev. 1.0)GA-MA78GM-S2HGA-MA78GPM-DS2HGA-MA790FX-DQ6GA-MA790GP-DS4HGA-MA790XT-UD4P (rev. 1.0)GA-P31-DS3LGA-P31-S3GGA-P55-USB3 (rev. 2.0)GA-P55A-UD4 (rev. 1.0)GA-P55A-UD7GA-P67A-UD3PGA-X58A-UD3R (rev. 2.0)GA-X58A-UD7 (rev. 2.0)GA-X79-UD5GA-X79-UD3GA-X79-UP4 (rev. 1.0)GA-Z68MA-D2H-B3 (rev. 1.3)GA-Z68MX-UD2H-B (rev. 1.3)GA-Z68XP-UD3 (rev. 1.0)GA-Z77MX-D3HGA-Z87-HD38100 Elite CMT PC (304Bh)Evans-GL6 (Pegatron IPMEL-AE)ProLiant N40Ldc7800xw4400 (0A68h)xw6400xw9300Z400 Workstation (0AE4h)IEIPICOe-9452D2700MUDD425KTD865GLCDG45IDDQ965GFDG965OTDH61AG DH67CFDH67CLDN2800MT (Marshalltown)DQ45CBDQ77MKEP80759FoxhollowGreencityJetwayJ-7BXANJ7F4K1G5D-PBLannerEM-8510CTilapia CRBLexCV700AMS-6153MS-6156MS-6178MS-6330 (K7T Turbo)MS-6566 (845 Ultra-C)MS-6570 (K7N2)MS-6704 (845PE Max2 PCB 1.0)MS-7065MS-7142 (K8MM-V)MS-7168 (Orion)MS-7211 (PM8M3-V)MS-7236 (945PL Neo3)MS-7250 (K9N SLI (rev 2.1))MS-7253 (K9VGM-V)MS-7255 (P4M890M)MS-7260 (K9N Neo PCB 1.0)MS-7309 (K9N6SGM-V)MS-7309 (K9N6PGM2-V2)MS-7312 (K9MM-V)MS-7336MS-7345 (P35 Neo2-FIR)MS-7357 (G33M)MS-7368 (K9AG Neo2-Digital)MS-7369 (K9N Neo V2)MS-7376 (K9A2 Platinum V1)MS-7379 (G31M)MS-7399 1.1 (Persian)MS-7502MS-7522 (MSI X58 Pro-E)MS-7529 (G31M3-L(S) V2)MS-7529 (G31TM-P21)MS-7548 (Aspen-GL8E)MS-7551 (KA780G)MS-7596 (785GM-E51)MS-7597 (GF615M-P33)MS-7599 (870-C45)MS-7613 (Iona-GL8E)MS-7635 (H55M-ED55)MS-7640 (890FXA-GD70)MS-7642 (890GXM-G65)MS-7676 (H67MA-ED55(B3))MS-7676 (Z68MA-G45 (B3))MS-7696 (A75MA-G55)MS-7698 (E350IA-E45)MS-7740 (H61MA-E35(B3))MS-7756 (H77MA-G43)MS-7760 (X79A-GD45 (8D))MS-7808 (B75MA-E33)MS-7816 (H87-G43)MS-7817 (H81M-E33)NECPowerMate 2000PalitN61SPCCHIPS M598LMR (V9.0)M863G (V5.1A)PC EnginesAlix.1cAlix.2c2Alix.2c3Alix.2d3Alix.3c3Alix.3d3Alix.6f2APUWRAP.2EPCWAREAPM80-D3PegatronIPP7A-CPPortwellPEB-4700VLARCARM4100SAPPHIREIPC-E350M1AB61AV11V30AV18E2FB61FD37FH67FN25FN78SX50/X50(B)SY-5VDSY-6BA+ IIIBlade x6250Fire x4150Fire x4200Fire x4540Fire x4600SupermicroA1SAi-2550FH8QC8H8QME-2X10SLM-FX5DP8-G2X7DBT-INFX7DWTX7SPA-H(F)X7SPE-HF-D525X8DT3X8DT6-FX8DTE-FX8DTG-DX8DTH-6FX8DTT-FX8DTT-HIBQFX8DTU-6TF+X8DTU-FX8SAXX8SIE(-F)X8SIL-FX8STiX9DR3-FX9DRD-7LN4FX9DRT-HF+X9DRWX9QRi-F+X9SCA-FX9SCE-FX9SCLX9SCM-FT-OnlineS-100ThomsonIP1000LomitaS1846 (Tsunami ATX)S2466 (Tiger MPX)S2723 (Tiger i7501)S2875 (Tiger K8W)S2881 (Thunder K8SR)S2882-D (Thunder K8SD Pro)S2882 (Thunder K8S Pro)S2891 (Thunder K8SRE)S2892 (Thunder K8SE)S2895 (Thunder K8WE)S2912 (Thunder n3600R)S2915-E (Thunder n6650W)S2915 (Thunder n6650W)S2933 (Thunder n3600S)S3095 (Tomcat i945GM)S3992 (Thunder h2000M)S4882 (Thunder K8QS Pro)S5180 (Toledo i965R)S5191 (Toledo i3000R)S5197 (Toledo i3010W)S5211-1U (Toledo i3200R)S5211 (Toledo i3210W)S5220 (Toledo q35T)S5375-1U (Tempest i5100X)S5375 (Tempest i5100X)S5376 (Tempest i5100W)S5377 (Tempest i5100T)S5382 (Tempest i5000PW)S5397 (Tempest i5400PW)S7066 (S7066WGM3NR)EITX-3000EPIA SPEPIA-CNEPIA-EX15000GEPIA-LNEPIA-M700EPIA-NX15000GNAB74X0pc2500ePC3500GVB700XZOTACGeForce 8200H61-ITX WiFi (H61ITX-A-E)H67-ITX WiFi (H67ITX-C-E)IONITX-A-EIONITX-F-EZBOX AD02 (PLUS)ZBOX HD-ID11print_supported@@Tried to register more than %i master interfaces.
register_par_master%s: addr=0x%x, len=%d, data:
No SFDP signature found.
SFDP revision = %d.%d
  ID 0x%02x, version %d.%d
  Parameter table contents:
    0x%04x:   3-Byte only addressing.
  Status register is WREN (0x06).
EWSR (0x50).
  Write chunk size is at least 64 B.
1 B only.
  Flash chip size is %d kB.
%s: invalid input, please report to flashrom@flashrom.org
  Tried to add a duplicate block eraser: %d x %d B with opcode 0x%02x.
  Block Eraser %d is already occupied.
  Block eraser %d: %d x %d B with opcode 0x%02x
%s: Not enough space to store another eraser (i=%d). Please report this at flashrom@flashrom.org
Receiving SFDP signature failed.
Signature = 0x%08x (should be 0x50444653)
Receiving SFDP revision and number of parameter headers (NPH) failed. The chip supports an unknown version of SFDP. Aborting SFDP probe!
SFDP number of parameter headers is %d (NPH = %d).
Receiving SFDP parameter table headers failed.

SFDP parameter table header %d/%d:
  Length %d B, Parameter Table Pointer 0x%06x
SFDP Parameter Table %d supposedly overflows addressable SFDP area. This most
probably indicates a corrupt SFDP parameter table header. Skipping it.
Fetching SFDP parameter table %d failed.
ID of the mandatory JEDEC SFDP parameter table is not 0 as demanded by JESD216 (warning only).
The chip contains an unknown version of the JEDEC flash parameters table, skipping it.
Length of the mandatory JEDEC SFDP parameter table is wrong (%d B), skipping it.
Parsing JEDEC flash parameter table...   3-Byte (and optionally 4-Byte) addressing.
  4-Byte only addressing (not supported by flashrom).
  Required addressing mode (0x%x) not supported.
volatile and writes to the status register have to be enabled with non-volatile and the standard does not allow vendors to tell us whether EWSR/WREN is needed for status register writes - assuming EWSR.
  4kB erase opcode is 0x%02x.
  4kB erase opcode is not defined.
Flash chip size >= 4 Gb/512 MB not supported.
Flash chip size is bigger than what 3-Byte addressing can access.
  It seems like this chip supports the preliminary Intel version of SFDP, skipping processing of double words 3-9.
   Erase Sector Type %d Size: 0x%02x
  Erase Sector Type %d is unused.
  Block size of erase Sector Type %d (2^%d) is too big for flashrom.
   Erase Sector Type %d Opcode: 0x%02x
sfdp_add_uniform_eraserspi_sfdp_read_sfdp_chunk%s failed during command execution
%d byte RDID not supported on this SPI controller
RDID byte 0 parity violation. RDID byte 1 parity violation. Can't handle 4-byte address for opcode '0x%02x'
with this chip/programmer combination.
4-byte address requested but master can't handle 4-byte addresses.
%s called for too long a write
%s failed during command execution at address 0x%x
Ignoring RES in favour of RDID.
Ignoring RES in favour of REMS.
%s: unknown erase opcode (0x%02x). Please report this at flashrom@flashrom.org
%s: start address not even! Please report a bug at flashrom@flashrom.org
%s: total write length not even! Please report a bug at flashrom@flashrom.org
%s failed during followup AAI command execution: %d
%s failed to disable AAI mode.
RDID returned%s: id1 0x%02x, id2 0x%02x
REMS returned 0x%02x 0x%02x. RES returned%s failed
%s: id1 0x%x, id2 0x%x
%s: id 0x%x
®*þÿ9+þÿ¦*þÿ9+þÿ9+þÿ9+þÿ9+þÿ9+þÿ9+þÿ9+þÿ9+þÿ9+þÿb+þÿ9+þÿ9+þÿ9+þÿj+þÿ9+þÿr+þÿÃ*þÿí*þÿí*þÿ»*þÿí*þÿí*þÿí*þÿí*þÿí*þÿí*þÿí*þÿí*þÿí*þÿí*þÿí*þÿí*þÿí*þÿí*þÿí*þÿ.+þÿ6+þÿí*þÿí*þÿ>+þÿå*þÿdefault_spi_write_aaispi_get_erasefn_from_opcodespi_block_erase_c7spi_block_erase_62spi_simple_write_cmdspi_block_erase_60spi_write_cmdspi_write_extended_address_registerprobe_spi_at25fprobe_spi_res3probe_spi_res2«probe_spi_res1ÿÿÿprobe_spi_remsprobe_spi_rdid_genericspi_write_enableno sectors are protected
some sectors are protected
all sectors are protected
reserved for future use
RDSR failed!
disabled.
ULBPR failed
bottom0x70000-0x7ffff0x60000-0x7ffff0x40000-0x7ffffall blocks1F0000H-1FFFFFH1E0000H-1FFFFFH1C0000H-1FFFFFH180000H-1FFFFFH100000H-1FFFFFHChip status register: Write Enable Latch (WEL) is %sset
Chip status register: Write In Progress (WIP/BUSY) is %sset
Chip status register: Block Protect 4 (BP4) is %sset
Chip status register: Block Protect 3 (BP3) is %sset
Chip status register: Block Protect 2 (BP2) is %sset
Chip status register: Block Protect 1 (BP1) is %sset
Chip status register: Block Protect 0 (BP0) is %sset
Chip status register: Erase/Program Error (EPE) is %sset
Chip status register: WP# pin (WPP) is %sasserted
Chip status register is 0x%02x.
Chip status register: Block Protect Write Disable (BPL) is %sset
Chip status register: Auto Address Increment Programming (AAI) is %sset
Chip status register: Software Protection Status (SWP): Error: WIP bit after WRSR never cleared
Missing status register write definition, assuming EWSR is needed
Block protection is disabled.
Some block protection in effect, disabling... 
	Need to disable the register lock first... Hardware protection is active, disabling write protection is impossible.
spi_write_status_register failed.
Unsetting lock bit(s) failed.
Block protection could not be disabled!
Chip status register: Bit %i is %sset
Chip status register: Status Register Write Disable (SRWD, SRP, ...) is %sset
Chip status register: Top/Bottom (TB) is %s
Chip status register: Sector Protect Size (SEC) is %i KB
Chip status register 2 is NOT decoded!
Chip status register: Sector Protection Register Lock (SRPL) is %sset
Ignoring security lockdown (if present)
Ignoring status register byte 2
Chip status register: Write Protect Enable (WPEN) is %sset
Chip status register: Bit 6 / Block Protect 4 (BP4) is %sset
Chip status register: Bit 5 / Block Protect 3 (BP3) is %sset
Chip status register: Bit 3 / Block Protect 1 (BP1) is %sset
Chip status register: Bit 2 / Block Protect 0 (BP0) is %sset
Chip status register: Sequential Program Mode Status (SPM) is %sset
Chip status register: WP# disable (WPDIS) is %sabled
Chip status register: Program Fail Flag (P_FAIL) is %sset
Chip status register: Erase Fail Flag (E_FAIL) is %sset
Resulting block protection : %s
spi_write_status_register_flagprobe_spi_st95%s called, but SPI read chunk size not defined on this hardware. Please report a bug at flashrom@flashrom.org
%s called, but SPI write chunk size not defined on this hardware. Please report a bug at flashrom@flashrom.org
register_spi_masterdefault_spi_write_256default_spi_readerase_chip_28sf040Lock status for 0x%06x (size 0x%06x) is %02x, Trying to clear lock for 0x%06x... Warning: Unlock Failed for block 0x%06x
full access
write locked
locked open
write locked down
Using clock_gettime for delay loops (clk_id: %d, resolution: %ldns).
timer loop overflow, reduced precision. delay more than 10%% too short (got %lu%% of expected delay), recalculating... delay loop is unreliable, trying to continue OS timer resolution is unusable. OS timer resolution is %lu usecs, Calibrating delay loop... %luM loops per second, 10 myus = %ld us, 100 myus = %ld us, 1000 myus = %ld us, 10000 myus = %ld us, %ld myus = %ld us, Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c %s' if you have a board with such a chip.
probe_w29ee011Lockout bits:
Bottom boot block:
Top boot block:
Software 64 kB bootblock locking is %sactive.
Software 16 kB bootblock locking is %sactive.
Hardware bootblock locking (#TBL) is %sactive.
Hardware remaining chip locking (#WP) is %sactive..
Software %d kB bootblock locking is %sactive.
Block locking for W39V080FA in dual mode is undocumented.
Hardware bootblock lockout is %sactive.
Error: No %s file specified.
layoutfmapreferenceCommand line (%i args):, "%s"vendor="%s" name="%s"
Failed to stat fmapfile "%s"
erasenoverifynoverify-allverboseifdfmap-fileflash-contentsflash-nameflash-sizeget-sizelist-supportedlist-supported-wikiprogrammerhelpPlease run "flashrom --help" for usage info.
Warning: Supplied %s file name starts with -
More than one operation specified. Aborting.
--verify and --noverify are mutually exclusive. Aborting.
Error: --layout specified more than once. Aborting.
Error: --layout and --ifd both specified. Aborting.
Error: --layout and --fmap-file both specified. Aborting.
Error: --fmap-file and --ifd both specified. Aborting.
Error: --fmap or --fmap-file specified more than once. Aborting.
Error: --fmap-file and --layout both specified. Aborting.
Error: --fmap and --ifd both specified. Aborting.
Error: --layout and --fmap both specified. Aborting.
Error: Wiki output was notcompiled in. Aborting.
Error: --programmer specified more than once. You can separate multiple
parameters for a programmer with ",". Please see the man page for details.
Usage: %s [-h|-R|-L|
	-p <programmername>[:<parameters>] [-c <chipname>]
		(--flash-name|--flash-size|
		 [-E|(-r|-w|-v) <file>]
		 [(-l <layoutfile>|--ifd| --fmap|--fmap-file <file>) [-i <imagename>]...]
		 [-n] [-N] [-f])]
	[-V[V[V]]] [-o <logfile>]

 -h | --help                        print this help text
 -R | --version                     print version (release)
 -r | --read <file>                 read flash and save to <file>
 -w | --write <file>                write <file> to flash
 -v | --verify <file>               verify flash against <file>
 -E | --erase                       erase flash memory
 -V | --verbose                     more verbose output
 -c | --chip <chipname>             probe only for specified flash chip
 -f | --force                       force specific operations (see man page)
 -n | --noverify                    don't auto-verify
 -N | --noverify-all                verify included regions only (cf. -i)
 -l | --layout <layoutfile>         read ROM layout from <layoutfile>
      --flash-name                  read out the detected flash name
      --flash-size                  read out the detected flash size
      --fmap                        read ROM layout from fmap embedded in ROM
      --fmap-file <fmapfile>        read ROM layout from fmap in <fmapfile>
      --ifd                         read layout from an Intel Firmware Descriptor
 -i | --image <name>                only flash image <name> from flash layout
 -o | --output <logfile>            log output to <logfile>
      --flash-contents <ref-file>   assume flash contents to be <ref-file>
 -L | --list-supported              print supported devices
 -p | --programmer <name>[:<param>] specify the programmer device. One of
.

You can specify one of -h, -R, -L, -E, -r, -w, -v or no operation.
If no operation is specified, flashrom will only probe for flash chips.
Log file not supported in standalone mode. Aborting.
Error: Extra parameter found.
Please select a programmer with the --programmer parameter.
To choose the mainboard of this computer use 'internal'. Valid choices are:
Error: Programmer initialization failed.
The following protocols are supported: %s.
Multiple flash chip definitions match the detected chip(s): "%s"
Please specify which chip definition to use with the -c <chipname> option.
No EEPROM/flash device found.
Note: flashrom can never write if the flash chip isn't found automatically.
Force read (-f -r -c) requested, pretending the chip is there:
No compatible controller found for the requested flash chip.
More than one compatible controller found for the requested flash chip, using the first one.
Probing for flash chip '%s' failed.
Please note that forced reads most likely contain garbage.
Found %s flash chip "%s" (%d kB, %s).
There is at least one interface available which could support the size of
the selected flash chip.
This flash chip is too big for this programmer (--verbose/-V gives details).
Use --force/-f to override at your own risk.
No operations were specified.
Error: Unknown chip '%s' specified.
Run flashrom -L to view the hardware supported in this flashrom version.
!ûÿ¬ûÿ¬ûÿ¬ûÿ¬ûÿ¬ûÿ¬ûÿûÿ¬ûÿgûÿ¬ûÿ¬ûÿ¬ûÿîûÿ¬ûÿ¬ûÿ¬ûÿËûÿ¬ûÿ¬ûÿ¬ûÿ¬ûÿ¬ûÿ¬ûÿ¬ûÿ¬ûÿ¬ûÿ¬ûÿ¬ûÿ¬ûÿ³ûÿ¬ûÿ¬ûÿ^ûÿ¬ûÿûÿÝûÿ¬ûÿ¬ûÿsûÿ¬ûÿÅûÿ¿ûÿûÿ¬ûÿçûÿ¬ûÿ¬ûÿ¬ûÿ«ûÿzûÿ¬ûÿ¬ûÿ³ûÿ^ûÿ/ûÿïûÿÙûÿ¹ûÿûÿr:Rw:v:nNVEfc:l:i:p:Lzho:This chip may contain one-time programmable memory. flashrom cannot read
and may never be able to write it, hence it may not be able to completely
clone the contents of this chip (see man page for details).
This chip's main memory can not be erased/written by design.
This flash part has status NOT WORKING for operations:This flash part has status UNTESTED for operations:The test status of this chip may have been updated in the latest development
version of flashrom. If you are running the latest development version,
please email a report to flashrom@flashrom.org if any of the above operations
work correctly for you with this flash chip. Please include the flashrom log
file for all operations you tested (see the man page for details), and mention
which mainboard or programmer you tested in the subject line.
Thanks for your help!
 PROBE READ ERASE WRITE;DG ûúÿxpûÿ ûÿ¸@
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