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idapro-loadint / opt / ida90 / libexec / loadint / dsp96k.cmt
Size: Mime:
DSP96_abs:          "Absolute Value"
DSP96_add:          "Addition"
DSP96_addc:         "Add with Carry"
DSP96_and:          "Logical AND"
DSP96_andc:         "AND Immediate with Complement"
DSP96_andi:         "AND Immediate to Control Register"
DSP96_asl:          "Arithmetic Shift Left"
DSP96_asr:          "Arithmetic Shift Right"
DSP96_bcc:          "Branch Conditionally (indirect)"
DSP96_bccd:         "Branch Conditionally (direct)"
DSP96_bchg:         "Bit Test and Change"
DSP96_bclr:         "Bit Test and Clear"
DSP96_bfind:        "Find Leading One"
DSP96_bra:          "Branch Always"
DSP96_brclr:        "Branch if Bit Clear"
DSP96_brset:        "Branch if Bit Set"
DSP96_bscc:         "Branch to Subroutine Conditionally (indirect)"
DSP96_bsccd:        "Branch to Subroutine Conditionally (direct)"
DSP96_bsclr:        "Branch to Subroutine if Bit Clear"
DSP96_bset:         "Bit Test and Set"
DSP96_bsr:          "Branch to Subroutine (indirect)"
DSP96_bsrd:         "Branch to Subroutine (direct)"
DSP96_bsset:        "Branch to Subroutine if Bit Set"
DSP96_btst:         "Bit Test on Memory and Registers"
DSP96_clr:          "Clear an Operand"
DSP96_cmp:          "Compare"
DSP96_cmpg:         "Graphics Compare with Trivial Accept.Reject Flags"
DSP96_debugcc:      "Enter Debug Mode Conditionally"
DSP96_dec:          "Decrement by One"
DSP96_do:           "Start Hardware Loop"
DSP96_dor:          "Start PC-Relative Hardware Loop"
DSP96_enddo:        "Exit from Hardware Loop"
DSP96_eor:          "Logical Exclusive OR"
DSP96_ext:          "Sign Extend 16-Bit To 32-Bit"
DSP96_extb:         "Sign Extend 8-Bit to 32-Bit"
DSP96_fabs:         "Absolute Value"
DSP96_fadd:         "Add"
DSP96_faddsub:      "Add and Subtract"
DSP96_fbcc:         "Branch Conditionally (Floating-Point Condition) (indirect)"
DSP96_fbccd:        "Branch Conditionally (Floating-Point Condition) (direct)"
DSP96_fbscc:        "Branch to Subroutine Conditionally (Floating-Point Condition) (indirect)"
DSP96_fbsccd:       "Branch to Subroutine Conditionally (Floating-Point Condition) (direct)"
DSP96_fclr:         "Clear a Floating-Point Operand"
DSP96_fcmp:         "Compare"
DSP96_fcmpg:        "Graphics Compare with Trivial Accept.Reject Flags"
DSP96_fcmpm:        "Compare Magnitude"
DSP96_fcopys:       "Copy Sign"
DSP96_fdebugcc:     "Enter Debug Mode Conditionally"
DSP96_fgetman:      "Get Mantissa"
DSP96_fint:         "Convert to Floating-Point Integer"
DSP96_fjcc:         "Jump Conditionally (indirect)"
DSP96_fjccd:        "Jump Conditionally (direct)"
DSP96_fjscc:        "Jump to Subroutine Conditionally (indirect)"
DSP96_fjsccd:       "Jump to Subroutine Conditionally (direct)"
DSP96_float:        "Integer to Floating-Point Conversion"
DSP96_floatu:       "Unsigned Integer to SP Floating-Point Conversion"
DSP96_floor:        "Convert to Floating-Point Integer round to -Infinity"
DSP96_fmove:        "Move FP Data Register(s)"
DSP96_fmpyfadd:     "Multiply and Add"
DSP96_fmpyfaddsub:  "Multiply, Add and Subtract"
DSP96_fmpyfsub:     "Multiply and Subtract"
DSP96_fmpy:         "Multiply"
DSP96_fneg:         "Change sign"
DSP96_fscale:       "Scale a Floating-Point Operand"
DSP96_fseedd:       "Reciprocal Approximation"
DSP96_fseedr:       "Square-Root Reciprocal Approximation"
DSP96_fsub:         "Subtract"
DSP96_ftfr:         "Transfer Floating-Point Register"
DSP96_ftrapcc:      "Conditional Software Interrupt"
DSP96_ftst:         "Test a floating-Point Operand"
DSP96_getexp:       "Get Exponent"
DSP96_illegal:      "Illegal Instruction"
DSP96_inc:          "Increment by One"
DSP96_int:          "Floating-Point to Integer Conversion"
DSP96_intrz:        "Floating-Point to Integer Conversion Round to Zero"
DSP96_intu:         "Floating-Point to Unsigned Integer Conversion"
DSP96_inturz:       "Floating-Point to Unsigned Integer Conversion Round to Zero"
DSP96_jcc:          "Jump Conditionally (indirect)"
DSP96_jccd:         "Jump Conditionally (direct)"
DSP96_jclr:         "Jump if Bit Clear"
DSP96_join:         "Join two 16-Bit Integers"
DSP96_joinb:        "Join two 8-Bit Integers"
DSP96_jscc:         "Jump to Subroutine Conditionally"
DSP96_jsccd:        "Jump to Subroutine Conditionally"
DSP96_jsclr:        "Jump to Subroutine if Bit Clear"
DSP96_jset:         "Jump if Bit Set"
DSP96_jsset:        "Jump to Subroutine if Bit Set"
DSP96_lea:          "Load Effective Address"
DSP96_lra:          "Load PC Relative Address"
DSP96_lsl:          "Logical Shift Left"
DSP96_lsr:          "Logical Shift Right"
DSP96_move:         "Move Data Register(s)"
DSP96_movec:        "Move Control Register"
DSP96_movei:        "Move Immediate"
DSP96_movem:        "Move Program Memory"
DSP96_movep:        "Move Peripheral Data"
DSP96_moves:        "Move Absolute Short"
DSP96_moveta:       "Move Data Register(s) and Test Address"
DSP96_mpys:         "Signed Multiply"
DSP96_mpyu:         "Unsigned Multiply"
DSP96_neg:          "Negate Accumulator"
DSP96_negc:         "Negate with Carry"
DSP96_nop:          "No Operation"
DSP96_not:          "Logical Complement"
DSP96_or:           "Logical Inclusive OR"
DSP96_orc:          "OR With Compliment"
DSP96_ori:          "OR Immediate to Control Register"
DSP96_rep:          "Repeat Next Instruction"
DSP96_reset:        "Reset On-Chip Peripheral Devices"
DSP96_rol:          "Rotate Left"
DSP96_ror:          "Rotate Right"
DSP96_rti:          "Return from Interrupt"
DSP96_rtr:          "Return from Subroutine and Restore Status Register"
DSP96_rts:          "Return from Subroutine"
DSP96_setw:         "Set an Operand"
DSP96_split:        "Extract 16-Bit Integer"
DSP96_splitb:       "Extract 8-Bit Integer"
DSP96_stop:         "Stop Processing (Low Power Stand-by)"
DSP96_sub:          "Subtract"
DSP96_subc:         "Subtract with Carry"
DSP96_tfr:          "Transfer Data ALU Register"
DSP96_trapcc:       "Software Interrupt Conditionally"
DSP96_tst:          "Test an Operand"
DSP96_wait:         "Wait for Interrupt or DMA Request (Low Power Stand-by)"