Repository URL to install this package:
Version:
9.1~250226-2.fc42 ▾
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SH3_add: "Add binary"
SH3_addc: "Add with Carry"
SH3_addv: "Add with V Flag Overflow Check"
SH3_and: "AND Logical"
SH3_and_b: "AND Byte Logical"
SH3_bf: "Branch if False"
SH3_bf_s: "Branch if False with Delay Slot"
SH3_bra: "Branch"
SH3_braf: "Branch Far"
SH3_bsr: "Branch to Subroutine"
SH3_bsrf: "Branch to Subroutine Far"
SH3_bt: "Branch if True"
SH3_bt_s: "Branch if True with Delay Slot"
SH3_clrmac: "Clear MAC register"
SH3_clrs: "Clear S Bit"
SH3_clrt: "Clear T Bit"
SH3_cmp_eq: "Compare: Equal"
SH3_cmp_ge: "Compare: Signed Greater or Equal"
SH3_cmp_gt: "Compare: Signed Greater"
SH3_cmp_hi: "Compare: Unsigned Greater"
SH3_cmp_hs: "Compare: Unsigned Greater or Equal"
SH3_cmp_pl: "Compare: Positive"
SH3_cmp_pz: "Compare: Positive or Zero"
SH3_cmp_str: "Compare: Equal Bytes"
SH3_div0s: "Divide Step 0 as Signed"
SH3_div0u: "Divide Step 0 as Unsigned"
SH3_div1: "Divide Step 1"
SH3_dmuls_l: "Double-Length Multiply as Signed"
SH3_dmulu_l: "Double-Length Multiply as Unsigned"
SH3_dt: "Decrement and Test"
SH3_exts_b: "Extend as Signed (Byte)"
SH3_exts_w: "Extend as Signed (Word)"
SH3_extu_b: "Extend as Unsigned (Byte)"
SH3_extu_w: "Extend as Unsigned (Word)"
SH3_jmp: "Jump"
SH3_jsr: "Jump to Subroutine"
SH3_ldc: "Load to Control Register"
SH3_ldc_l: "Load to Control Register Long"
SH3_lds: "Load to System Register"
SH3_lds_l: "Load to System Register Long"
SH3_ldtlb: "Load PTEH/PTEL/PTEA to TLB"
SH3_mac_w: "Multiply and Accumulate Word"
SH3_mac_l: "Multiply and Accumulate Long"
SH3_mov: "Move Data"
SH3_mov_b: "Move Byte Data"
SH3_mov_w: "Move Word Data"
SH3_mov_l: "Move Long Data"
SH3_movi: "Move Immediate Byte Data"
SH3_movi_w: "Move Immediate Word Data"
SH3_movi_l: "Move Immediate Long Data"
SH3_movp_b: "Move Peripherial Byte Data"
SH3_movp_w: "Move Peripherial Word Data"
SH3_movp_l: "Move Peripherial Long Data"
SH3_movs_b: "Move Structure Byte Data"
SH3_movs_w: "Move Structure Word Data"
SH3_movs_l: "Move Structure Long Data"
SH3_mova: "Move Effective Address"
SH3_movt: "Move T Bit"
SH3_mul: "Multiply Long"
SH3_muls: "Multiply as Signed Word"
SH3_mulu: "Multiply as Unsigned Word"
SH3_neg: "Negate"
SH3_negc: "Negate with Carry"
SH3_nop: "No Operation"
SH3_not: "NOT - Logical Complement"
SH3_or: "OR Logical"
SH3_or_b: "OR Byte Logical"
SH3_pref: "Prefetch Data to the Cache"
SH3_rotcl: "Rotate with Carry Left"
SH3_rotcr: "Rotate with Carry Right"
SH3_rotl: "Rotate Left"
SH3_rotr: "Rotate Right"
SH3_rte: "Return from Exception"
SH3_rts: "Return from Subroutine"
SH3_sets: "Set S Bit"
SH3_sett: "Set T Bit"
SH3_shad: "Shift Arithmetic Dynamically"
SH3_shal: "Shift Arithmetic Left"
SH3_shar: "Shift Arithmetic Right"
SH3_shld: "Shift Logical Dynamically"
SH3_shll: "Shift Logical Left"
SH3_shll2: "Shift Logical Left 2"
SH3_shll8: "Shift Logical Left 8"
SH3_shll16: "Shift Logical Left 16"
SH3_shlr: "Shift Logical Right"
SH3_shlr2: "Shift Logical Right 2"
SH3_shlr8: "Shift Logical Right 8"
SH3_shlr16: "Shift Logical Right 16"
SH3_sleep: "Sleep"
SH3_stc: "Store Control Register"
SH3_stc_l: "Store Control Register Long"
SH3_sts: "Store System Register"
SH3_sts_l: "Store System Register Long"
SH3_sub: "Subtract Binary"
SH3_subc: "Subtract with Carry"
SH3_subv: "Subtract with V Flag Underflow Check"
SH3_swap_b: "Swap Register Halves (Byte)"
SH3_swap_w: "Swap Register Halves (Word)"
SH3_tas_b: "Test and Set"
SH3_trapa: "Trap Always"
SH3_tst: "Test Logical"
SH3_tst_b: "Test Byte Logical"
SH3_xor: "Exclusive OR Logical"
SH3_xor_b: "Exclusive OR Byte Logical"
SH3_xtrct: "Extract"
SH4_fabs: "Floating-point absolute value"
SH4_fadd: "Floating-point add"
SH4_fcmp_eq: "Floating-point compare eqaul"
SH4_fcmp_gt: "Floating-point compare greater than"
SH4_fcnvds: "Floating-point convert double to single precision"
SH4_fcnvsd: "Floating-point convert single to double precision"
SH4_fdiv: "Floating-point divide"
SH4_fipr: "Floating-point inner product"
SH4_fldi0: "Floating-point load immediate 0.0"
SH4_fldi1: "Floating-point load immediate 1.0"
SH4_flds: "Floating-point load to system register"
SH4_float: "Floating-point convert from integer"
SH4_fmac: "Floating-point multiply and accumulate"
SH4_fmov: "Floating-point move"
SH4_fmov_s: "Floating-point move single precision"
SH4_fmovex: "Floating-point move extension"
SH4_fmul: "Floating-point multiply"
SH4_fneg: "Floating-point sign inversion"
SH4_frchg: "FR-bit change"
SH4_fschg: "SZ-bit change"
SH4_fsqrt: "Floating-point square root"
SH4_fsts: "Floating-point store system register"
SH4_fsub: "Floating-point subtract"
SH4_ftrc: "Floating-point truncate and convert to integer"
SH4_ftrv: "Floating-point transform vector"
SH4_ftstn: "Floating point square root reciprocal approximate"
SH4_movca_l: "Move with cache block allocation"
SH4_ocbi: "Operand cache block invalidate"
SH4_ocbp: "Operand cache block purge"
SH4_ocbwb: "Operand cache block write back"
SH4_fsca: "Floating point sine and cosine approximate"
SH2a_band_b: "Bit And Byte Data"
SH2a_bandnot_b: "Bit And Not Byte Data"
SH2a_bclr: "Bit Clear"
SH2a_bclr_b: "Bit Clear Byte Data"
SH2a_bld: "Bit Load"
SH2a_bld_b: "Bit Load Byte Data"
SH2a_bldnot_b: "Bit Load Not Byte Data"
SH2a_bor_b: "Bit Or Byte Data"
SH2a_bornot_b: "Bit Or Not Byte Data"
SH2a_bset: "Bit Set"
SH2a_bset_b: "Bit Set Byte Data"
SH2a_bst: "Bit Store"
SH2a_bst_b: "Bit Store Byte Data"
SH2a_bxor_b: "Bit Exclusive Or Byte Data"
SH2a_clips_b: "Clip as Signed Byte"
SH2a_clips_w: "Clip as Signed Word"
SH2a_clipu_b: "Clip as Unsigned Byte"
SH2a_clipu_w: "Clip as Unsigned Word"
SH2a_divs: "Divide as Signed"
SH2a_divu: "Divide as Unsigned"
SH2a_jsr_n: "Jump to Subroutine with No delay slot"
SH2a_ldbank: "Load Register Bank"
SH2a_movi20: "20-bit immediate data transfer"
SH2a_movi20s: "20-bit immediate data transfer: 8-bit left-shift"
SH2a_movml_l: "Move Multi-register Lower part"
SH2a_movmu_l: "Move Multi-register Upper part"
SH2a_movrt: "Move Reverse T bit"
SH2a_movu_b: "Move Structure Byte Data as Unsigned"
SH2a_movu_w: "Move Structure Word Data as Unsigned"
SH2a_mulr: "Multiply to Register"
SH2a_nott: "Not T bit"
SH2a_resbank: "Restore From Register Bank"
SH2a_rts_n: "Return from Subroutine with No delay slot"
SH2a_rtv_n: "Return to Value and from Subroutine with No delay slot"
SH2a_stbank: "Store Register Bank"
SH4a_movco_l: "Move Conditional"
SH4a_movli_l: "Move Linked"
SH4a_movua_l: "Move Unaligned"
SH4a_icbi: "Instruction Cache Block Invalidate"
SH4a_prefi: "Prefetch Instruction Cache Block"
SH4a_synco: "Synchronize Data Operation"
SH4a_fsrra: "Floating Point Square Reciprocal Approximate"
SH4a_fpchg: "PR-bit Change"