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Version:
9.0~240807-1.fc42 ▾
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;; Modified from m16c60.cfg
;; Source: M32C_V5_41_1/V5_41_1/Generate/sfr/C/M16C/80/sfr80144.h
;; Source: Renesas rej09b0187_16c80hm.pdf - M16C/80 group hardware manual
;
; The format of the input file:
; each device definition begins with a line like this:
;
; .devicename
;
; after it go the port definitions in this format:
;
; portname address
;
; the bit definitions (optional) are represented like this:
;
; portname.bitname bitnumber
;
; lines beginning with a space are ignored.
; comment lines should be started with ';' character.
;
; the default device is specified at the start of the file
;
; .default device_name
;
; all lines non conforming to the format are passed to the callback function
.default m16c
.m16c
; SFR area
pm0 0x4 Processor mode register 0
pm0.pm00 0 Processor mode bit
pm0.pm01 1 Processor mode bit
pm0.pm02 2 R/W mode select bit
pm0.pm03 3 Software reset bit
pm0.pm04 4 Multiplexed bus space select bit
pm0.pm05 5 Multiplexed bus space select bit
pm0.pm06 6
pm0.pm07 7 BCLK output function select bit
pm1 0x5 Processor mode register 1
pm1.pm10 0 External memory area mode bit
pm1.pm11 1 External memory area mode bit
pm1.pm12 2 Internal memory wait bit
pm1.pm13 3
pm1.pm14 4 ALE pin select bit
pm1.pm15 5 ALE pin select bit
cm0 0x6 System clock control register 0
cm0.cm00 0 Clock output function select bit
cm0.cm01 1 Clock output function select bit
cm0.cm02 2 WAIT peripheral function clock stop bit
cm0.cm03 3 Xcin-Xcout drive capacity select bit
cm0.cm04 4 Port Xc select bit
cm0.cm05 5 Main clock stop bit
cm0.cm06 6 WDT function select bit
cm0.cm07 7 System clock select bit
cm1 0x7 System clock control register 1
cm1.cm10 0 All clock stop control bit
cm1.cm11 1
cm1.cm12 2
cm1.cm13 3
cm1.cm14 4
cm1.cm15 5 Xin-Xout drive capacity select bit
wcr 0x8 Wait control register
aier 0x9 Address match interrupt enable register
aier.aier0 0 Address match interrupt 0 enable bit
aier.aier1 1 Address match interrupt 1 enable bit
aier.aier2 2 Address match interrupt 2 enable bit
aier.aier3 3 Address match interrupt 3 enable bit
prcr 0xa Protect register
prcr.prc0 0 Enables writing to system clock control register 0 and 1
prcr.prc1 1 Enables writing to processor mode register 0 and 1
prcr.prc2 2 Enables writing to port P9 direction register and function select register A3
; was ds, renamed to avoid conflict with the "ds" pseudo-register
dsw 0xb External data bus width control register
mcd 0xc Main clock division register
wdts 0xe Watchdog timer start register
wdc 0xf Watchdog timer control register
wdc.wdc7 7 Prescaler select bit
rmad0l 0x10 Address match interrupt register 0 low
rmad0m 0x11 Address match interrupt register 0 mid
rmad0h 0x12 Address match interrupt register 0 high
rmad1l 0x14 Address match interrupt register 1 low
rmad1m 0x15 Address match interrupt register 1 mid
rmad1h 0x16 Address match interrupt register 1 high
rmad2l 0x18 Address match interrupt register 2 low
rmad2m 0x19 Address match interrupt register 2 mid
rmad2h 0x1a Address match interrupt register 2 high
rmad3l 0x1c Address match interrupt register 3 low
rmad3m 0x1d Address match interrupt register 3 mid
rmad3h 0x1e Address match interrupt register 3 high
dramcont 0x40 DRAM control register
refcnt 0x41 DRAM refresh interval set register
dm0ic 0x68 DMA0 interrupt control register
tb5ic 0x69 Timer B5 interrupt register
dm2ic 0x6a DMA2 interrupt register
s2ric 0x6b UART2 receive/ack interrupt control register
ta0ic 0x6c Timer A0 interrupt control register
s3ric 0x6d UART3 receive/ack interrupt control register
ta2ic 0x6e Timer A2 interrupt control register
s4ric 0x6f UART4 receive/ack interrupt control register
ta4ic 0x70 Timer A4 interrupt control register
bcn3ic 0x71 Bus collision (UART3) interrupt control register
s0ric 0x72 UART0 receive interrupt control register
adic 0x73 A/D conversion interrupt control register
s1ric 0x74 UART1 receive interrupt control register
tb1ic 0x76 Timer B1 interrupt control register
tb3ic 0x78 Timer B3 interrupt control register
int5ic 0x7a INT5~ interrupt control register
int3ic 0x7c INT3~ interrupt control register
int1ic 0x7e INT1~ interrupt control register
dm1ic 0x88 DMA1 interrupt control register
s2tic 0x89 UART2 transmit/nack interrupt control register
dm3ic 0x8a DMA3 interrupt control register
s3tic 0x8b UART3 transmit/nack interrupt control register
ta1ic 0x8c Timer A1 interrupt control register
s4tic 0x8d UART4 transmit/nack interrupt control register
ta3ic 0x8e Timer A3 interrupt control register
bcn2ic 0x8f Bus collision (UART2) interrupt control register
s0tic 0x90 UART0 transmit interrupt control register
bcn4ic 0x91 Bus collision (UART4) interrupt control register
s1tic 0x92 UART1 transmit interrupt control register
kupic 0x93 Key input interrupt control register
tb0ic 0x94 Timer B0 interrupt control register
tb2ic 0x96 Timer B2 interrupt control register
tb4ic 0x98 Timer B4 interrupt control register
int4ic 0x9a INT4~ interrupt control register
int2ic 0x9c INT2~ interrupt control register
int0ic 0x9e INT0~ interrupt control register
rlvl 0x9f Exit priority register
y0r 0x2c0 Y0 register
y1r 0x2c2 Y1 register
y2r 0x2c4 Y2 register
y3r 0x2c6 Y3 register
y4r 0x2c8 Y4 register
y5r 0x2ca Y5 register
y6r 0x2cc Y6 register
y7r 0x2ce Y7 register
y8r 0x2d0 Y8 register
y9r 0x2d2 Y9 register
y10r 0x2d4 Y10 register
y11r 0x2d6 Y11 register
y12r 0x2d8 Y12 register
y13r 0x2da Y13 register
y14r 0x2dc Y14 register
y15r 0x2de Y15 register
xyc 0x2e0 X-Y control register
u4smr3 0x2f5 UART4 special mode register 3
u4smr2 0x2f6 UART4 special mode register 2
u4smr 0x2f7 UART4 special mode register
u4mr 0x2f8 UART4 transmit/receive mode register
u4mr.smd0 0 Serial I/O mode select bit
u4mr.smd1 1 Serial I/O mode select bit
u4mr.smd2 2 Serial I/O mode select bit
u4mr.ckdir 3 Internal/external clock select bit
u4mr.stps 4 Stop bit length select bit
u4mr.pry 5 Odd/even parity select bit
u4mr.prye 6 Parity enable bit
u4mr.iopol 7 TxD RxD I/O polarity reverse bit
u4brg 0x2f9 UART4 bit rate generator
u4tbl 0x2fa UART4 transmit buffer register low
u4tbh 0x2fb UART4 transmit buffer register high
u4c0 0x2fc UART4 transmit/receive control register 0
u4c0.clk0 0 BRG count source select bit
u4c0.clk1 1 BRG count source select bit
u4c0.crs 2 CTS~/RTS~ function select bit
u4c0.txept 3 Transmit register empty flag
u4c0.crd 4 CTS~/RTS~ disable bit
u4c0.nch 5 Data output select bit
u4c0.ckpol 6 CLK polarity select bit
u4c0.uform 7 Transfer format select bit
u4c1 0x2fd UART4 transmit/receive control register 1
u4c1.te 0 Transmit enable bit
u4c1.ti 1 Transmit buffer empty flag
u4c1.re 2 Receive enable bit
u4c1.ri 3 Receive complete flag
u4c1.u4irs 4 UART4 transmit interrupt cause select bit
u4c1.u4rrm 5 UART4 continuous receive mode enable bit
u4c1.u4lch 6 Data logic select bit
u4c1.u4ere 7 Error signal output enable bit
u4rbl 0x2fe UART4 receive buffer register low
u4rbh 0x2ff UART4 receive buffer register high
u4rbh.abt 3 Arbitration lost detecting flag
u4rbh.oer 4 Overrun error flag
u4rbh.fer 5 Framing error flag
u4rbh.per 6 Parity error flag
u4rbh.sum 7 Error sum flag
tbsr 0x300 Timer B3,4,5 count start flag
tbsr.tb3s 5 Timer B3 count start flag
tbsr.tb4s 6 Timer B4 count start flag
tbsr.tb5s 7 Timer B5 count start flag
ta11 0x302 Timer A1-1 register
ta21 0x304 Timer A2-1 register
ta41 0x306 Timer A4-1 register
invc0 0x308 Three-phase PWM control register 0
invc1 0x309 Three-phase PWM control register 1
idb0 0x30a Three-phase output buffer register 0
idb1 0x30b Three-phase output buffer register 1
dtt 0x30c Dead time timer
ictb2 0x30d Timer B2 interrupt occurrences frequency set counter
tb3 0x310 Timer B3 register
tb4 0x312 Timer B4 register
tb5 0x314 Timer B5 register
tb3mr 0x31b Timer B3 mode register
tb3mr.tmod0 0 Operation mode select bit
tb3mr.tmod1 1 Operation mode select bit
tb3mr.mr0 2
tb3mr.mr1 3
tb3mr.mr2 4
tb3mr.mr3 5
tb3mr.tck0 6 Count source select bit
tb3mr.tck1 7 Count source select bit
tb4mr 0x31c Timer B4 mode register
tb4mr.tmod0 0 Operation mode select bit
tb4mr.tmod1 1 Operation mode select bit
tb4mr.mr0 2
tb4mr.mr1 3
tb4mr.mr2 4
tb4mr.mr3 5
tb4mr.tck0 6 Count source select bit
tb4mr.tck1 7 Count source select bit
tb5mr 0x31d Timer B5 mode register
tb5mr.tmod0 0 Operation mode select bit
tb5mr.tmod1 1 Operation mode select bit
tb5mr.mr0 2
tb5mr.mr1 3
tb5mr.mr2 4
tb5mr.mr3 5
tb5mr.tck0 6 Count source select bit
tb5mr.tck1 7 Count source select bit
ifsr 0x31f Interrupt cause select register
u3smr3 0x325 UART3 special mode register 3
u3smr2 0x326 UART3 special mode register 2
u3smr 0x327 UART3 special mode register
u3mr 0x328 UART3 transmit/receive mode register
u3mr.smd0 0 Serial I/O mode select bit
u3mr.smd1 1 Serial I/O mode select bit
u3mr.smd2 2 Serial I/O mode select bit
u3mr.ckdir 3 Internal/external clock select bit
u3mr.stps 4 Stop bit length select bit
u3mr.pry 5 Odd/even parity select bit
u3mr.prye 6 Parity enable bit
u3mr.iopol 7 TxD RxD I/O polarity reverse bit
u3brg 0x329 UART3 bit rate generator
u3tbl 0x32a UART3 transmit buffer register low
u3tbh 0x32b UART3 transmit buffer register high
u3c0 0x32c UART3 transmit/receive control register 0
u3c0.clk0 0 BRG count source select bit
u3c0.clk1 1 BRG count source select bit
u3c0.crs 2 CTS~/RTS~ function select bit
u3c0.txept 3 Transmit register empty flag
u3c0.crd 4 CTS~/RTS~ disable bit
u3c0.nch 5 Data output select bit
u3c0.ckpol 6 CLK polarity select bit
u3c0.uform 7 Transfer format select bit
u3c1 0x32d UART3 transmit/receive control register 1
u3c1.te 0 Transmit enable bit
u3c1.ti 1 Transmit buffer empty flag
u3c1.re 2 Receive enable bit
u3c1.ri 3 Receive complete flag
u3c1.u3irs 4 UART3 transmit interrupt cause select bit
u3c1.u3rrm 5 UART3 continuous receive mode enable bit
u3c1.u3lch 6 Data logic select bit
u3c1.u3ere 7 Error signal output enable bit
u3rbl 0x32e UART3 receive buffer register
u3rbh 0x32f UART3 receive buffer register
u3rbh.abt 3 Arbitration lost detecting flag
u3rbh.oer 4 Overrun error flag
u3rbh.fer 5 Framing error flag
u3rbh.per 6 Parity error flag
u3rbh.sum 7 Error sum flag
u2smr3 0x335 UART2 special mode register 3
u2smr2 0x336 UART2 special mode register 2
u2smr 0x337 UART2 special mode register
u2mr 0x338 UART2 transmit/receive mode register
u2mr.smd0 0 Serial I/O mode select bit
u2mr.smd1 1 Serial I/O mode select bit
u2mr.smd2 2 Serial I/O mode select bit
u2mr.ckdir 3 Internal/external clock select bit
u2mr.stps 4 Stop bit length select bit
u2mr.pry 5 Odd/even parity select bit
u2mr.prye 6 Parity enable bit
u2mr.iopol 7 TxD RxD I/O polarity reverse bit
u2brg 0x339 UART2 bit rate generator
u2tbl 0x33a UART2 transmit buffer register low
u2tbh 0x33b UART2 transmit buffer register high
u2c0 0x33c UART2 transmit/receive control register 0
u2c0.clk0 0 BRG count source select bit
u2c0.clk1 1 BRG count source select bit
u2c0.crs 2 CTS~/RTS~ function select bit
u2c0.txept 3 Transmit register empty flag
u2c0.crd 4 CTS~/RTS~ disable bit
u2c0.nch 5 Data output select bit
u2c0.ckpol 6 CLK polarity select bit
u2c0.uform 7 Transfer format select bit
u2c1 0x33d UART2 transmit/receive control register 1
u2c1.te 0 Transmit enable bit
u2c1.ti 1 Transmit buffer empty flag
u2c1.re 2 Receive enable bit
u2c1.ri 3 Receive complete flag
u2c1.u2irs 4 UART2 transmit interrupt cause select bit
u2c1.u2rrm 5 UART2 continuous receive mode enable bit
u2c1.u2lch 6 Data logic select bit
u2c1.u2ere 7 Error signal output enable bit
u2rbl 0x33e UART2 receive buffer register low
u2rbh 0x33f UART2 receive buffer register high
u2rbh.abt 3 Arbitration lost detecting flag
u2rbh.oer 4 Overrun error flag
u2rbh.fer 5 Framing error flag
u2rbh.per 6 Parity error flag
u2rbh.sum 7 Error sum flag
tabsr 0x340 Count start flag
tabsr.ta0s 0 Timer A0 count start flag
tabsr.ta1s 1 Timer A1 count start flag
tabsr.ta2s 2 Timer A2 count start flag
tabsr.ta3s 3 Timer A3 count start flag
tabsr.ta4s 4 Timer A4 count start flag
tabsr.tb0s 5 Timer B0 count start flag
tabsr.tb1s 6 Timer B1 count start flag
tabsr.tb2s 7 Timer B2 count start flag
cpsrf 0x341 Clock prescaler reset flag
cpsrf.cpsr 7 Clock prescaler reset flag
onsf 0x342 One-shot start flag
onsf.ta0os 0 Timer A0 one-shot start flag
onsf.ta1os 1 Timer A1 one-shot start flag
onsf.ta2os 2 Timer A2 one-shot start flag
onsf.ta3os 3 Timer A3 one-shot start flag
onsf.ta4os 4 Timer A4 one-shot start flag
onsf.tazie 5 Timer A4 Z-phase input valid bit
onsf.ta0tgl 6 Timer A0 event/trigger select bit
onsf.ta0tgh 7 Timer A0 event/trigger select bit
trgsr 0x343 Trigger select register
trgsr.ta1tgl 0 Timer A1 event/trigger select bit
trgsr.ta1tgh 1 Timer A1 event/trigger select bit
trgsr.ta2tgl 2 Timer A2 event/trigger select bit
trgsr.ta2tgh 3 Timer A2 event/trigger select bit
trgsr.ta3tgl 4 Timer A3 event/trigger select bit
trgsr.ta3tgh 5 Timer A3 event/trigger select bit
trgsr.ta4tgl 6 Timer A4 event/trigger select bit
trgsr.ta4tgh 7 Timer A4 event/trigger select bit
udf 0x344 Up/down flag
ta0 0x346 Timer A0 register
ta1 0x348 Timer A1 register
ta2 0x34a Timer A2 register
ta3 0x34c Timer A3 register
ta4 0x34e Timer A4 register
tb0 0x350 Timer B0 register
tb1 0x352 Timer B1 register
tb2 0x354 Timer B2 register
ta0mr 0x356 Timer A0 mode register
ta0mr.tmod0 0 Operation mode select bit
ta0mr.tmod1 1 Operation mode select bit
ta0mr.mr0 2
ta0mr.mr1 3
ta0mr.mr2 4
ta0mr.mr3 5
ta0mr.tck0 6 Count source select bit
ta0mr.tck1 7 Count source select bit
ta1mr 0x357 Timer A1 mode register
ta1mr.tmod0 0 Operation mode select bit
ta1mr.tmod1 1 Operation mode select bit
ta1mr.mr0 2
ta1mr.mr1 3
ta1mr.mr2 4
ta1mr.mr3 5
ta1mr.tck0 6 Count source select bit
ta1mr.tck1 7 Count source select bit
ta2mr 0x358 Timer A2 mode register
ta2mr.tmod0 0 Operation mode select bit
ta2mr.tmod1 1 Operation mode select bit
ta2mr.mr0 2
ta2mr.mr1 3
ta2mr.mr2 4
ta2mr.mr3 5
ta2mr.tck0 6 Count source select bit
ta2mr.tck1 7 Count source select bit
ta3mr 0x359 Timer A3 mode register
ta3mr.tmod0 0 Operation mode select bit
ta3mr.tmod1 1 Operation mode select bit
ta3mr.mr0 2
ta3mr.mr1 3
ta3mr.mr2 4
ta3mr.mr3 5
ta3mr.tck0 6 Count source select bit
ta3mr.tck1 7 Count source select bit
ta4mr 0x35a Timer A4 mode register
ta4mr.tmod0 0 Operation mode select bit
ta4mr.tmod1 1 Operation mode select bit
ta4mr.mr0 2
ta4mr.mr1 3
ta4mr.mr2 4
ta4mr.mr3 5
ta4mr.tck0 6 Count source select bit
ta4mr.tck1 7 Count source select bit
tb0mr 0x35b Timer B0 mode register
tb0mr.tmod0 0 Operation mode select bit
tb0mr.tmod1 1 Operation mode select bit
tb0mr.mr0 2
tb0mr.mr1 3
tb0mr.mr2 4
tb0mr.mr3 5
tb0mr.tck0 6 Count source select bit
tb0mr.tck1 7 Count source select bit
tb1mr 0x35c Timer B1 mode register
tb1mr.tmod0 0 Operation mode select bit
tb1mr.tmod1 1 Operation mode select bit
tb1mr.mr0 2
tb1mr.mr1 3
tb1mr.mr2 4
tb1mr.mr3 5
tb1mr.tck0 6 Count source select bit
tb1mr.tck1 7 Count source select bit
tb2mr 0x35d Timer B2 mode register
tb2mr.tmod0 0 Operation mode select bit
tb2mr.tmod1 1 Operation mode select bit
tb2mr.mr0 2
tb2mr.mr1 3
tb2mr.mr2 4
tb2mr.mr3 5
tb2mr.tck0 6 Count source select bit
tb2mr.tck1 7 Count source select bit
u0mr 0x360 UART0 transmit/receive mode register
u0mr.smd0 0 Serial I/O mode select bit
u0mr.smd1 1 Serial I/O mode select bit
u0mr.smd2 2 Serial I/O mode select bit
u0mr.ckdir 3 Internal/external clock select bit
u0mr.stps 4 Stop bit length select bit
u0mr.pry 5 Odd/even parity select bit
u0mr.prye 6 Parity enable bit
u0mr.slep 7 Sleep select bit
u0brg 0x361 UART0 bit rate generator
u0tbl 0x362 UART0 transmit buffer register low
u0tbh 0x363 UART0 transmit buffer register high
u0c0 0x364 UART0 transmit/receive control register 0
u0c0.clk0 0 BRG count source select bit
u0c0.clk1 1 BRG count source select bit
u0c0.crs 2 CTS~/RTS~ function select bit
u0c0.txept 3 Transmit register empty flag
u0c0.crd 4 CTS~/RTS~ disable bit
u0c0.nch 5 Data output select bit
u0c0.ckpol 6 CLK polarity select bit
u0c0.uform 7 Transfer format select bit
u0c1 0x365 UART0 transmit/receive control register 1
u0c1.te 0 Transmit enable bit
u0c1.ti 1 Transmit buffer empty flag
u0c1.re 2 Receive enable bit
u0c1.ri 3 Receive complete flag
u0rbl 0x366 UART0 receive buffer register low
u0rbh 0x367 UART0 receive buffer register high
u0rbh.oer 4 Overrun error flag
u0rbh.fer 5 Framing error flag
u0rbh.per 6 Parity error flag
u0rbh.sum 7 Error sum flag
u1mr 0x368 UART1 transmit/receive mode register
u1mr.smd0 0 Serial I/O mode select bit
u1mr.smd1 1 Serial I/O mode select bit
u1mr.smd2 2 Serial I/O mode select bit
u1mr.ckdir 3 Internal/external clock select bit
u1mr.stps 4 Stop bit length select bit
u1mr.pry 5 Odd/even parity select bit
u1mr.prye 6 Parity enable bit
u1mr.slep 7 Sleep select bit
u1brg 0x369 UART1 bit rate generator
u1tbl 0x36a UART1 transmit buffer register low
u1tbh 0x36b UART1 transmit buffer register high
u1c0 0x36c UART1 transmit/receive control register 0
u1c0.clk0 0 BRG count source select bit
u1c0.clk1 1 BRG count source select bit
u1c0.crs 2 CTS~/RTS~ function select bit
u1c0.txept 3 Transmit register empty flag
u1c0.crd 4 CTS~/RTS~ disable bit
u1c0.nch 5 Data output select bit
u1c0.ckpol 6 CLK polarity select bit
u1c0.uform 7 Transfer format select bit
u1c1 0x36d UART1 transmit/receive control register 1
u1c1.te 0 Transmit enable bit
u1c1.ti 1 Transmit buffer empty flag
u1c1.re 2 Receive enable bit
u1c1.ri 3 Receive complete flag
u1rbl 0x36e UART1 receive buffer register low
u1rbh 0x36f UART1 receive buffer register high
u1rbh.oer 4 Overrun error flag
u1rbh.fer 5 Framing error flag
u1rbh.per 6 Parity error flag
u1rbh.sum 7 Error sum flag
ucon 0x370 UART transmit/receive control register 2
ucon.u0irs 0 UART0 transmit interrupt cause select bit
ucon.u1irs 1 UART1 transmit interrupt cause select bit
ucon.u0rrm 2 UART0 continuous receive mode enable bit
ucon.u1rrm 3 UART1 continuous receive mode enable bit
ucon.b4 4
ucon.b5 5
ucon.rcsp 6 Separate CTS~/RTS~ bit
fmr1 0x376 Flash memory control register 1
fmr0 0x377 Flash memory control register 0
dm0sl 0x378 DMA0 cause select register
dm0sl.dsel0 0 DMA request cause select bit
dm0sl.dsel1 1 DMA request cause select bit
dm0sl.dsel2 2 DMA request cause select bit
dm0sl.dsel3 3 DMA request cause select bit
dm0sl.dsel4 4 DMA request cause select bit
dm0sl.dsr 5 Software DMA request bit
dm0sl.b6 6
dm0sl.drq 7 DMA request bit
dm1sl 0x379 DMA1 cause select register
dm1sl.dsel0 0 DMA request cause select bit
dm1sl.dsel1 1 DMA request cause select bit
dm1sl.dsel2 2 DMA request cause select bit
dm1sl.dsel3 3 DMA request cause select bit
dm1sl.dsel4 4 DMA request cause select bit
dm1sl.dsr 5 Software DMA request bit
dm1sl.b6 6
dm1sl.drq 7 DMA request bit
dm2sl 0x37a DMA1 cause select register
dm2sl.dsel0 0 DMA request cause select bit
dm2sl.dsel1 1 DMA request cause select bit
dm2sl.dsel2 2 DMA request cause select bit
dm2sl.dsel3 3 DMA request cause select bit
dm2sl.dsel4 4 DMA request cause select bit
dm2sl.dsr 5 Software DMA request bit
dm2sl.b6 6
dm2sl.drq 7 DMA request bit
dm3sl 0x37b DMA1 cause select register
dm3sl.dsel0 0 DMA request cause select bit
dm3sl.dsel1 1 DMA request cause select bit
dm3sl.dsel2 2 DMA request cause select bit
dm3sl.dsel3 3 DMA request cause select bit
dm3sl.dsel4 4 DMA request cause select bit
dm3sl.dsr 5 Software DMA request bit
dm3sl.b6 6
dm3sl.drq 7 DMA request bit
crcdl 0x37c CRC data register low
crcdh 0x37d CRC data register high
crcin 0x37e CRC input register
ad0l 0x380 A/D register 0 low
ad0h 0x381 A/D register 0 high
ad1l 0x382 A/D register 1 low
ad1h 0x383 A/D register 1 high
ad2l 0x384 A/D register 2 low
ad2h 0x385 A/D register 2 high
ad3l 0x386 A/D register 3 low
ad3h 0x387 A/D register 3 high
ad4l 0x388 A/D register 4 low
ad4h 0x389 A/D register 4 high
ad5l 0x38a A/D register 5 low
ad5h 0x38b A/D register 5 high
ad6l 0x38c A/D register 6 low
ad6h 0x38d A/D register 6 high
ad7l 0x38e A/D register 7 low
ad7h 0x38f A/D register 7 high
adcon2 0x394 A/D control register 2
adcon2.smp 0 A/D conversion method select bit
adcon0 0x396 A/D control register 0
adcon0.ch0 0 Analog input pin select bit
adcon0.ch1 1 Analog input pin select bit
adcon0.ch2 2 Analog input pin select bit
adcon0.md0 3 A/D operation mode select bit 0
adcon0.md1 4 A/D operation mode select bit 0
adcon0.trg 5 Trigger select bit
adcon0.adst 6 A/D conversion start flag
adcon0.cks0 7 Frequency select bit 0
adcon1 0x397 A/D control register 1
adcon1.scan0 0 A/D sweep pin select bit
adcon1.scan1 1 A/D sweep pin select bit
adcon1.md2 2 A/D operation mode select bit 1
adcon1.bits 3 8/10-bit mode select bit
adcon1.cks1 4 Frequency select bit 1
adcon1.vcut 5 Vref connect bit
adcon1.opa0 6 External op-amp connection mode bit
adcon1.opa1 7 External op-amp connection mode bit
da0 0x398 D/A register 0
da1 0x39a D/A register 1
dacon 0x39c D/A control register
dacon.da0e 0 D/A0 output enable bit
dacon.da1e 1 D/A1 output enable bit
psc 0x3af Function select register C
ps0 0x3b0 Function select register A0
ps1 0x3b1 Function select register A1
psl0 0x3b2 Function select register B0
psl1 0x3b3 Function select register B1
ps2 0x3b4 Function select register A2
ps3 0x3b5 Function select register A3
psl2 0x3b6 Function select register B2
psl3 0x3b7 Function select register B3
p6 0x3c0 Port P6 register
p6.p6_0 0 Port P6 bit0
p6.p6_1 1 Port P6 bit1
p6.p6_2 2 Port P6 bit2
p6.p6_3 3 Port P6 bit3
p6.p6_4 4 Port P6 bit4
p6.p6_5 5 Port P6 bit5
p6.p6_6 6 Port P6 bit6
p6.p6_7 7 Port P6 bit7
p7 0x3c1 Port P7 register
p7.p7_0 0 Port P7 bit0
p7.p7_1 1 Port P7 bit1
p7.p7_2 2 Port P7 bit2
p7.p7_3 3 Port P7 bit3
p7.p7_4 4 Port P7 bit4
p7.p7_5 5 Port P7 bit5
p7.p7_6 6 Port P7 bit6
p7.p7_7 7 Port P7 bit7
pd6 0x3c2 Port P6 direction register
pd6.pd6_0 0 P6 direction register bit0
pd6.pd6_1 1 P6 direction register bit1
pd6.pd6_2 2 P6 direction register bit2
pd6.pd6_3 3 P6 direction register bit3
pd6.pd6_4 4 P6 direction register bit4
pd6.pd6_5 5 P6 direction register bit5
pd6.pd6_6 6 P6 direction register bit6
pd6.pd6_7 7 P6 direction register bit7
pd7 0x3c3 Port P7 direction register
pd7.pd7_0 0 P7 direction register bit0
pd7.pd7_1 1 P7 direction register bit1
pd7.pd7_2 2 P7 direction register bit2
pd7.pd7_3 3 P7 direction register bit3
pd7.pd7_4 4 P7 direction register bit4
pd7.pd7_5 5 P7 direction register bit5
pd7.pd7_6 6 P7 direction register bit6
pd7.pd7_7 7 P7 direction register bit7
p8 0x3c4 Port P8 register
p8.p8_0 0 Port P8 bit0
p8.p8_1 1 Port P8 bit1
p8.p8_2 2 Port P8 bit2
p8.p8_3 3 Port P8 bit3
p8.p8_4 4 Port P8 bit4
p8.p8_5 5 Port P8 bit5
p8.p8_6 6 Port P8 bit6
p8.p8_7 7 Port P8 bit7
p9 0x3c5 Port P9 register
p9.p9_0 0 Port P9 bit0
p9.p9_1 1 Port P9 bit1
p9.p9_2 2 Port P9 bit2
p9.p9_3 3 Port P9 bit3
p9.p9_4 4 Port P9 bit4
p9.p9_5 5 Port P9 bit5
p9.p9_6 6 Port P9 bit6
p9.p9_7 7 Port P9 bit7
pd8 0x3c6 Port P8 direction register
pd8.pd8_0 0 P8 direction register bit0
pd8.pd8_1 1 P8 direction register bit1
pd8.pd8_2 2 P8 direction register bit2
pd8.pd8_3 3 P8 direction register bit3
pd8.pd8_4 4 P8 direction register bit4
pd8.pd8_5 5
pd8.pd8_6 6 P8 direction register bit6
pd8.pd8_7 7 P8 direction register bit7
pd9 0x3c7 Port P9 direction register
pd9.pd9_0 0 P9 direction register bit0
pd9.pd9_1 1 P9 direction register bit1
pd9.pd9_2 2 P9 direction register bit2
pd9.pd9_3 3 P9 direction register bit3
pd9.pd9_4 4 P9 direction register bit4
pd9.pd9_5 5 P9 direction register bit5
pd9.pd9_6 6 P9 direction register bit6
pd9.pd9_7 7 P9 direction register bit7
p10 0x3c8 Port P10 register
p10.p10_0 0 Port P10 bit0
p10.p10_1 1 Port P10 bit1
p10.p10_2 2 Port P10 bit2
p10.p10_3 3 Port P10 bit3
p10.p10_4 4 Port P10 bit4
p10.p10_5 5 Port P10 bit5
p10.p10_6 6 Port P10 bit6
p10.p10_7 7 Port P10 bit7
p11 0x3c9 Port P11 register
p11.p11_0 0 Port P11 bit0
p11.p11_1 1 Port P11 bit1
p11.p11_2 2 Port P11 bit2
p11.p11_3 3 Port P11 bit3
p11.p11_4 4 Port P11 bit4
pd10 0x3ca Port P10 direction register
pd10.pd10_0 0 P10 direction register bit0
pd10.pd10_1 1 P10 direction register bit1
pd10.pd10_2 2 P10 direction register bit2
pd10.pd10_3 3 P10 direction register bit3
pd10.pd10_4 4 P10 direction register bit4
pd10.pd10_5 5 P10 direction register bit5
pd10.pd10_6 6 P10 direction register bit6
pd10.pd10_7 7 P10 direction register bit7
pd11 0x3cb Port P11 direction register
pd11.pd11_0 0 P11 direction register bit0
pd11.pd11_1 1 P11 direction register bit1
pd11.pd11_2 2 P11 direction register bit2
pd11.pd11_3 3 P11 direction register bit3
pd11.pd11_4 4 P11 direction register bit4
p12 0x3cc Port P12 register
p12.p12_0 0 Port P12 bit0
p12.p12_1 1 Port P12 bit1
p12.p12_2 2 Port P12 bit2
p12.p12_3 3 Port P12 bit3
p12.p12_4 4 Port P12 bit4
p12.p12_5 5 Port P12 bit5
p12.p12_6 6 Port P12 bit6
p12.p12_7 7 Port P12 bit7
p13 0x3cd Port P13 register
p13.p13_0 0 Port P13 bit0
p13.p13_1 1 Port P13 bit1
p13.p13_2 2 Port P13 bit2
p13.p13_3 3 Port P13 bit3
p13.p13_4 4 Port P13 bit4
p13.p13_5 5 Port P13 bit5
p13.p13_6 6 Port P13 bit6
p13.p13_7 7 Port P13 bit7
pd12 0x3ce Port P12 direction register
pd12.pd12_0 0 P12 direction register bit0
pd12.pd12_1 1 P12 direction register bit1
pd12.pd12_2 2 P12 direction register bit2
pd12.pd12_3 3 P12 direction register bit3
pd12.pd12_4 4 P12 direction register bit4
pd12.pd12_5 5 P12 direction register bit5
pd12.pd12_6 6 P12 direction register bit6
pd12.pd12_7 7 P12 direction register bit7
pd13 0x3cf Port P13 direction register
pd13.pd13_0 0 P13 direction register bit0
pd13.pd13_1 1 P13 direction register bit1
pd13.pd13_2 2 P13 direction register bit2
pd13.pd13_3 3 P13 direction register bit3
pd13.pd13_4 4 P13 direction register bit4
pd13.pd13_5 5 P13 direction register bit5
pd13.pd13_6 6 P13 direction register bit6
pd13.pd13_7 7 P13 direction register bit7
p14 0x3d0 Port P14 register
p14.p14_0 0 Port P14 bit0
p14.p14_1 1 Port P14 bit1
p14.p14_2 2 Port P14 bit2
p14.p14_3 3 Port P14 bit3
p14.p14_4 4 Port P14 bit4
p14.p14_5 5 Port P14 bit5
p14.p14_6 6 Port P14 bit6
p15 0x3d1 Port P15 register
p15.p15_0 0 Port P15 bit0
p15.p15_1 1 Port P15 bit1
p15.p15_2 2 Port P15 bit2
p15.p15_3 3 Port P15 bit3
p15.p15_4 4 Port P15 bit4
p15.p15_5 5 Port P15 bit5
p15.p15_6 6 Port P15 bit6
p15.p15_7 7 Port P15 bit7
pd14 0x3d2 Port P14 direction register
pd14.pd14_0 0 P14 direction register bit0
pd14.pd14_1 1 P14 direction register bit1
pd14.pd14_2 2 P14 direction register bit2
pd14.pd14_3 3 P14 direction register bit3
pd14.pd14_4 4 P14 direction register bit4
pd14.pd14_5 5 P14 direction register bit5
pd14.pd14_6 6 P14 direction register bit6
pd15 0x3d3 Port P15 direction register
pd15.pd15_0 0 P15 direction register bit0
pd15.pd15_1 1 P15 direction register bit1
pd15.pd15_2 2 P15 direction register bit2
pd15.pd15_3 3 P15 direction register bit3
pd15.pd15_4 4 P15 direction register bit4
pd15.pd15_5 5 P15 direction register bit5
pd15.pd15_6 6 P15 direction register bit6
pd15.pd15_7 7 P15 direction register bit7
pur2 0x3da Pull-up control register 2
pur2.pu20 0 Pull-up P60 to P63
pur2.pu21 1 Pull-up P64 to P67
pur2.pu22 2 Pull-up P70 to P73 ; Except P70,P71
pur2.pu23 3 Pull-up P74 to P77
pur2.pu24 4 Pull-up P80 to P83
pur2.pu25 5 Pull-up P84 to P87 ; Except P85
pur2.pu26 6 Pull-up P90 to P93
pur2.pu27 7 Pull-up P94 to P97
pur3 0x3db Pull-up control register 3
pur3.pu30 0 Pull-up P100 to P103
pur3.pu31 1 Pull-up P104 to P107
pur3.pu32 2 Pull-up P110 to P113
pur3.pu33 3 Pull-up P114
pur3.pu34 4 Pull-up P120 to P123
pur3.pu35 5 Pull-up P124 to P127
pur3.pu36 6 Pull-up P130 to P133
pur3.pu37 7 Pull-up P134 to P137
pur4 0x3dc Pull-up control register 4
pur4.pu40 0 Pull-up P140 to P143
pur4.pu41 1 Pull-up P144 to P146
pur4.pu42 2 Pull-up P150 to P153
pur4.pu43 3 Pull-up P154 to P157
p0 0x3e0 Port P0 register
p0.p0_0 0 Port P0 bit0
p0.p0_1 1 Port P0 bit1
p0.p0_2 2 Port P0 bit2
p0.p0_3 3 Port P0 bit3
p0.p0_4 4 Port P0 bit4
p0.p0_5 5 Port P0 bit5
p0.p0_6 6 Port P0 bit6
p0.p0_7 7 Port P0 bit7
p1 0x3e1 Port P1 register
p1.p1_0 0 Port P1 bit0
p1.p1_1 1 Port P1 bit1
p1.p1_2 2 Port P1 bit2
p1.p1_3 3 Port P1 bit3
p1.p1_4 4 Port P1 bit4
p1.p1_5 5 Port P1 bit5
p1.p1_6 6 Port P1 bit6
p1.p1_7 7 Port P1 bit7
pd0 0x3e2 Port P0 direction register
pd0.pd0_0 0 P0 direction register bit0
pd0.pd0_1 1 P0 direction register bit1
pd0.pd0_2 2 P0 direction register bit2
pd0.pd0_3 3 P0 direction register bit3
pd0.pd0_4 4 P0 direction register bit4
pd0.pd0_5 5 P0 direction register bit5
pd0.pd0_6 6 P0 direction register bit6
pd0.pd0_7 7 P0 direction register bit7
pd1 0x3e3 Port P1 direction register
pd1.pd1_0 0 P1 direction register bit0
pd1.pd1_1 1 P1 direction register bit1
pd1.pd1_2 2 P1 direction register bit2
pd1.pd1_3 3 P1 direction register bit3
pd1.pd1_4 4 P1 direction register bit4
pd1.pd1_5 5 P1 direction register bit5
pd1.pd1_6 6 P1 direction register bit6
pd1.pd1_7 7 P1 direction register bit7
p2 0x3e4 Port P2 register
p2.p2_0 0 Port P2 bit0
p2.p2_1 1 Port P2 bit1
p2.p2_2 2 Port P2 bit2
p2.p2_3 3 Port P2 bit3
p2.p2_4 4 Port P2 bit4
p2.p2_5 5 Port P2 bit5
p2.p2_6 6 Port P2 bit6
p2.p2_7 7 Port P2 bit7
p3 0x3e5 Port P3 register
p3.p3_0 0 Port P3 bit0
p3.p3_1 1 Port P3 bit1
p3.p3_2 2 Port P3 bit2
p3.p3_3 3 Port P3 bit3
p3.p3_4 4 Port P3 bit4
p3.p3_5 5 Port P3 bit5
p3.p3_6 6 Port P3 bit6
p3.p3_7 7 Port P3 bit7
pd2 0x3e6 Port P2 direction register
pd2.pd2_0 0 P2 direction register bit0
pd2.pd2_1 1 P2 direction register bit1
pd2.pd2_2 2 P2 direction register bit2
pd2.pd2_3 3 P2 direction register bit3
pd2.pd2_4 4 P2 direction register bit4
pd2.pd2_5 5 P2 direction register bit5
pd2.pd2_6 6 P2 direction register bit6
pd2.pd2_7 7 P2 direction register bit7
pd3 0x3e7 Port P3 direction register
pd3.pd3_0 0 P3 direction register bit0
pd3.pd3_1 1 P3 direction register bit1
pd3.pd3_2 2 P3 direction register bit2
pd3.pd3_3 3 P3 direction register bit3
pd3.pd3_4 4 P3 direction register bit4
pd3.pd3_5 5 P3 direction register bit5
pd3.pd3_6 6 P3 direction register bit6
pd3.pd3_7 7 P3 direction register bit7
p4 0x3e8 Port P4 register
p4.p4_0 0 Port P4 bit0
p4.p4_1 1 Port P4 bit1
p4.p4_2 2 Port P4 bit2
p4.p4_3 3 Port P4 bit3
p4.p4_4 4 Port P4 bit4
p4.p4_5 5 Port P4 bit5
p4.p4_6 6 Port P4 bit6
p4.p4_7 7 Port P4 bit7
p5 0x3e9 Port P5 register
p5.p5_0 0 Port P5 bit0
p5.p5_1 1 Port P5 bit1
p5.p5_2 2 Port P5 bit2
p5.p5_3 3 Port P5 bit3
p5.p5_4 4 Port P5 bit4
p5.p5_5 5 Port P5 bit5
p5.p5_6 6 Port P5 bit6
p5.p5_7 7 Port P5 bit7
pd4 0x3ea Port P4 direction register
pd4.pd4_0 0 P4 direction register bit0
pd4.pd4_1 1 P4 direction register bit1
pd4.pd4_2 2 P4 direction register bit2
pd4.pd4_3 3 P4 direction register bit3
pd4.pd4_4 4 P4 direction register bit4
pd4.pd4_5 5 P4 direction register bit5
pd4.pd4_6 6 P4 direction register bit6
pd4.pd4_7 7 P4 direction register bit7
pd5 0x3eb Port P5 direction register
pd5.pd5_0 0 P5 direction register bit0
pd5.pd5_1 1 P5 direction register bit1
pd5.pd5_2 2 P5 direction register bit2
pd5.pd5_3 3 P5 direction register bit3
pd5.pd5_4 4 P5 direction register bit4
pd5.pd5_5 5 P5 direction register bit5
pd5.pd5_6 6 P5 direction register bit6
pd5.pd5_7 7 P5 direction register bit7
pur0 0x3f0 Pull-up control register 0
pur0.pu00 0 Pull-up P00 to P03
pur0.pu01 1 Pull-up P04 to P07
pur0.pu02 2 Pull-up P10 to P13
pur0.pu03 3 Pull-up P14 to P17
pur0.pu04 4 Pull-up P20 to P23
pur0.pu05 5 Pull-up P24 to P27
pur0.pu06 6 Pull-up P30 to P33
pur0.pu07 7 Pull-up P34 to P37
pur1 0x3f1 Pull-up control register 1
pur1.pu10 0 Pull-up P40 to P43
pur1.pu11 1 Pull-up P44 to P47
pur1.pu12 2 Pull-up P50 to P53
pur1.pu13 3 Pull-up P54 to P57
pcr 0x3ff Port control register
pcr.pcr0 0 Port P1 control register