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Version:
9.0~240807-1.fc42 ▾
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;; Modified from m16c60.cfg
;; Source: M32C_V5_41_1/V5_41_1/Generate/sfr/C/M32C/80/sfr32c80.h
;; Source: Renesas rej09b0271_32c80hm.pdf - M32C/80 group hardware manual
;
; The format of the input file:
; each device definition begins with a line like this:
;
; .devicename
;
; after it go the port definitions in this format:
;
; portname address
;
; the bit definitions (optional) are represented like this:
;
; portname.bitname bitnumber
;
; lines beginning with a space are ignored.
; comment lines should be started with ';' character.
;
; the default device is specified at the start of the file
;
; .default device_name
;
; all lines non conforming to the format are passed to the callback function
.default m32c
.m32c
; SFR area
pm0 0x4 Processor mode register 0
pm0.pm00 0 Processor mode bit
pm0.pm01 1 Processor mode bit
pm0.pm02 2 R/W mode select bit
pm0.pm03 3 Software reset bit
pm0.pm04 4 Multiplexed bus space select bit
pm0.pm05 5 Multiplexed bus space select bit
pm0.pm06 6
pm0.pm07 7 BCLK output function select bit
pm1 0x5 Processor mode register 1
pm1.pm10 0 External memory area mode bit
pm1.pm11 1 External memory area mode bit
pm1.pm12 2 Internal memory wait bit
pm1.pm13 3 SFR wait bit
pm1.pm14 4 ALE pin select bit
pm1.pm15 5 ALE pin select bit
cm0 0x6 System clock control register 0
cm0.cm00 0 Clock output function select bit
cm0.cm01 1 Clock output function select bit
cm0.cm02 2 WAIT peripheral function clock stop bit
cm0.cm03 3 Xcin-Xcout drive capacity select bit
cm0.cm04 4 Port Xc select bit
cm0.cm05 5 Main clock stop bit
cm0.cm06 6 WDT function select bit
cm0.cm07 7 CPU clock select bit0
cm1 0x7 System clock control register 1
cm1.cm10 0 All clock stop control bit
cm1.cm11 1
cm1.cm12 2
cm1.cm13 3
cm1.cm14 4
cm1.cm15 5
cm1.cm16 6
cm1.cm17 7 CPU clock select bit1
aier 0x9 Address match interrupt enable register
aier.aier0 0 Address match interrupt 0 enable bit
aier.aier1 1 Address match interrupt 1 enable bit
aier.aier2 2 Address match interrupt 2 enable bit
aier.aier3 3 Address match interrupt 3 enable bit
aier.aier4 4 Address match interrupt 4 enable bit
aier.aier5 5 Address match interrupt 5 enable bit
aier.aier6 6 Address match interrupt 6 enable bit
aier.aier7 7 Address match interrupt 7 enable bit
prcr 0xa Protect register
prcr.prc0 0 Protect bit0
prcr.prc1 1 Protect bit1
prcr.prc2 2 Protect bit2
prcr.prc3 3 Protect bit3
; was ds, renamed to avoid conflict with the "ds" pseudo-register
dsw 0xb External data bus width control register
dsw.ds0 0 External space 0 data bus width select bit
dsw.ds1 1 External space 1 data bus width select bit
dsw.ds2 2 External space 2 data bus width select bit
dsw.ds3 3 External space 3 data bus width select bit
mcd 0xc Main clock division register
mcd.mcd0 0 (b4-b0) Main clock division select bit
mcd.mcd1 1 (b4-b0) Main clock division select bit
mcd.mcd2 2 (b4-b0) Main clock division select bit
mcd.mcd3 3 (b4-b0) Main clock division select bit
mcd.mcd4 4 (b4-b0) Main clock division select bit
cm2 0xd Oscillation stop detect register
cm2.cm20 0 Oscillation stop detect enable bit
cm2.cm21 1 CPU clock select bit2
cm2.cm22 2 Oscillation stop detect flag
cm2.cm23 3 Main clock monitor flag
wdts 0xe Watchdog timer start register
wdc 0xf Watchdog timer control register
wdc.wdc5 5 Cold start/warm start detect flag
wdc.wdc6 6
wdc.wdc7 7 Prescaler select bit
rmad0l 0x10 Address match interrupt register 0 low
rmad0m 0x11 Address match interrupt register 0 mid
rmad0h 0x12 Address match interrupt register 0 high
pm2 0x13 Processor mode register 2
pm2.pm21 1 System clock protect bit
pm2.pm22 2 WDT count source protect bit
pm2.pm23 3
pm2.pm24 4 (b4) CPU clock select bit3
pm2.pm25 5 (b5) CAN clock select bit
pm2.pm26 6 (b7-b6) f2n count source select bit
pm2.pm27 7 (b7-b6) f2n count source select bit
rmad1l 0x14 Address match interrupt register 1 low
rmad1m 0x15 Address match interrupt register 1 mid
rmad1h 0x16 Address match interrupt register 1 high
vcr2 0x17 Voltage detection register 2
vcr2.vc26 6 Reset level monitor bit
vcr2.vc27 7 Voltage down monitor bit
rmad2l 0x18 Address match interrupt register 2 low
rmad2m 0x19 Address match interrupt register 2 mid
rmad2h 0x1a Address match interrupt register 2 high
vcr1 0x1b Voltage detection register 1
vcr1.vc13 3 Voltage down monitor flag
rmad3l 0x1c Address match interrupt register 3 low
rmad3m 0x1d Address match interrupt register 3 mid
rmad3h 0x1e Address match interrupt register 3 high
plc0 0x26 PLL control register 0
plc0.plc00 0 (b2-b0) Programmable counter select bit
plc0.plc01 1 (b2-b0) Programmable counter select bit
plc0.plc02 2 (b2-b0) Programmable counter select bit
plc0.plc03 3
plc0.plc04 4
plc0.plc05 5
plc0.plc06 6
plc0.plc07 7 Operation enable bit
plc1 0x27 PLL control register 1
plc1.plc12 2 PLL clock division switch bit
rmad4l 0x28 Address match interrupt register 4 low
rmad4m 0x29 Address match interrupt register 4 mid
rmad4h 0x2a Address match interrupt register 4 high
rmad5l 0x2c Address match interrupt register 5 low
rmad5m 0x2d Address match interrupt register 5 mid
rmad5h 0x2e Address match interrupt register 5 high
rmad6l 0x38 Address match interrupt register 6 low
rmad6m 0x39 Address match interrupt register 6 mid
rmad6h 0x3a Address match interrupt register 6 high
rmad7l 0x3c Address match interrupt register 7 low
rmad7m 0x3d Address match interrupt register 7 mid
rmad7h 0x3e Address match interrupt register 7 high
ewcr0 0x48 External space wait control register 0
ewcr0.ewcr000 0 (b4-b0) Bus cycle select bit
ewcr0.ewcr001 1 (b4-b0) Bus cycle select bit
ewcr0.ewcr002 2 (b4-b0) Bus cycle select bit
ewcr0.ewcr003 3 (b4-b0) Bus cycle select bit
ewcr0.ewcr004 4 (b4-b0) Bus cycle select bit
ewcr0.ewcr005 5
ewcr0.ewcr006 6 Recovery cycle addition select bit
ewcr1 0x49 External space wait control register 1
ewcr1.ewcr100 0 (b4-b0) Bus cycle select bit
ewcr1.ewcr101 1 (b4-b0) Bus cycle select bit
ewcr1.ewcr102 2 (b4-b0) Bus cycle select bit
ewcr1.ewcr103 3 (b4-b0) Bus cycle select bit
ewcr1.ewcr104 4 (b4-b0) Bus cycle select bit
ewcr1.ewcr105 5
ewcr1.ewcr106 6 Recovery cycle addition select bit
ewcr2 0x4a External space wait control register 2
ewcr2.ewcr200 0 (b4-b0) Bus cycle select bit
ewcr2.ewcr201 1 (b4-b0) Bus cycle select bit
ewcr2.ewcr202 2 (b4-b0) Bus cycle select bit
ewcr2.ewcr203 3 (b4-b0) Bus cycle select bit
ewcr2.ewcr204 4 (b4-b0) Bus cycle select bit
ewcr2.ewcr205 5
ewcr2.ewcr206 6 Recovery cycle addition select bit
ewcr3 0x4b External space wait control register 3
ewcr3.ewcr300 0 (b4-b0) Bus cycle select bit
ewcr3.ewcr301 1 (b4-b0) Bus cycle select bit
ewcr3.ewcr302 2 (b4-b0) Bus cycle select bit
ewcr3.ewcr303 3 (b4-b0) Bus cycle select bit
ewcr3.ewcr304 4 (b4-b0) Bus cycle select bit
ewcr3.ewcr305 5
ewcr3.ewcr306 6 Recovery cycle addition select bit
dm0ic 0x68 DMA0 interrupt control register
tb5ic 0x69 Timer B5 interrupt register
dm2ic 0x6a DMA2 interrupt register
s2ric 0x6b UART2 receive/ack interrupt control register
ta0ic 0x6c Timer A0 interrupt control register
s3ric 0x6d UART3 receive/ack interrupt control register
ta2ic 0x6e Timer A2 interrupt control register
s4ric 0x6f UART4 receive/ack interrupt control register
ta4ic 0x70 Timer A4 interrupt control register
bcn3ic 0x71 Bus collision (UART3) interrupt control register
s0ric 0x72 UART0 receive interrupt control register
ad0ic 0x73 A/D0 conversion interrupt control register
s1ric 0x74 UART1 receive interrupt control register
iio0ic 0x75 Intelligent I/O interrupt control register 0
tb1ic 0x76 Timer B1 interrupt control register
iio2ic 0x77 Intelligent I/O interrupt control register 2
tb3ic 0x78 Timer B3 interrupt control register
iio4ic 0x79 Intelligent I/O interrupt control register 4
int5ic 0x7a INT5~ interrupt control register
int3ic 0x7c INT3~ interrupt control register
int1ic 0x7e INT1~ interrupt control register
dm1ic 0x88 DMA1 interrupt control register
s2tic 0x89 UART2 transmit/nack interrupt control register
dm3ic 0x8a DMA3 interrupt control register
s3tic 0x8b UART3 transmit/nack interrupt control register
ta1ic 0x8c Timer A1 interrupt control register
s4tic 0x8d UART4 transmit/nack interrupt control register
ta3ic 0x8e Timer A3 interrupt control register
bcn2ic 0x8f Bus collision (UART2) interrupt control register
s0tic 0x90 UART0 transmit interrupt control register
bcn4ic 0x91 Bus collision (UART4) interrupt control register
s1tic 0x92 UART1 transmit interrupt control register
kupic 0x93 Key input interrupt control register
tb0ic 0x94 Timer B0 interrupt control register
iio1ic 0x95 Intelligent I/O interrupt control register 1
tb2ic 0x96 Timer B2 interrupt control register
iio3ic 0x97 Intelligent I/O interrupt control register 3
tb4ic 0x98 Timer B4 interrupt control register
int4ic 0x9a INT4~ interrupt control register
int2ic 0x9c INT2~ interrupt control register
int0ic 0x9e INT0~ interrupt control register
rlvl 0x9f Exit priority register
rlvl.rlvl0 0 (b2-b0) Interrupt priority set bits to exit STOP/WAIT mode
rlvl.rlvl1 1 (b2-b0) Interrupt priority set bits to exit STOP/WAIT mode
rlvl.rlvl2 2 (b2-b0) Interrupt priority set bits to exit STOP/WAIT mode
rlvl.fsit 3 High-speed interrupt set bit
rlvl.b4 4
rlvl.dmaii 5 DMAC II select bit
iio0ir 0xa0 Interrupt request register 0
iio0ir.tm13r_po13r 2 II/O time measurement / waveform generation 3
iio0ir.b3 3
iio0ir.g0rir 4 II/O communication unit 0 HDLC data processing function interrupt
iio0ir.sio0rr 5 II/O communication unit 0 receive interrupt
iio0ir.b6 6
iio0ir.can10r 7 CAN1 communication function interrupt
iio1ir 0xa1 Interrupt request register 1
iio1ir.tm14r_po14r 2 II/O time measurement / waveform generation 4
iio1ir.b3 3
iio1ir.g0tor 4 II/O communication unit 0 HDLC data processing function interrupt
iio1ir.sio0tr 5 II/O communication unit 0 transmit interrupt
iio1ir.b6 6
iio1ir.can11r 7 CAN1 communication function interrupt
iio2ir 0xa2 Interrupt request register 2
iio2ir.tm12r_po12r 2 II/O time measurement / waveform generation 2
iio2ir.b3 3
iio2ir.g1rir 4 II/O communication unit 1 HDLC data processing function interrupt
iio2ir.sio1rr 5 II/O communication unit 1 receive interrupt
iio3ir 0xa3 Interrupt request register 3
iio3ir.tm10r_po10r 2 II/O time measurement / waveform generation 0
iio3ir.b3 3
iio3ir.g1tor 4 II/O communication unit 1 HDLC data processing function interrupt
iio3ir.sio1tr 5 II/O communication unit 0 transmit interrupt
iio4ir 0xa4 Interrupt request register 4
iio4ir.tm17r_po17r 2 II/O time measurement / waveform generation 7
iio4ir.b3 3
iio4ir.bt1r 4 II/O communication base timer interrupt
iio4ir.b5 5
iio4ir.srt1r 6 II/O special communication function interrupt
iio4ir.srt0r 7 II/O special communication function interrupt
iio5ir 0xa5 Interrupt request register 5
iio5ir.can1wur 6 CAN1 wake-up interrupt
iio5ir.can12r 7 CAN1 communication function interrupt
iio0ie 0xb0 Interrupt enable register 0
iio0ie.irlt 0 Interrupt request select bit
iio0ie.b1 1
iio0ie.tm13e_po13e 2 II/O time measurement / waveform generation 3
iio0ie.b3 3
iio0ie.g0rie 4 II/O communication unit 0 HDLC data processing function interrupt
iio0ie.sio0re 5 II/O communication unit 0 receive interrupt
iio0ie.b6 6
iio0ie.can10e 7 CAN1 communication function interrupt
iio1ie 0xb1 Interrupt enable register 1
iio1ie.irlt 0 Interrupt request select bit
iio1ie.b1 1
iio1ie.tm14e_po14e 2 II/O time measurement / waveform generation 4
iio1ie.b3 3
iio1ie.g0toe 4 II/O communication unit 0 HDLC data processing function interrupt
iio1ie.sio0te 5 II/O communication unit 0 receive interrupt
iio1ie.b6 6
iio1ie.can11e 7 CAN1 communication function interrupt
iio2ie 0xb2 Interrupt enable register 2
iio2ie.irlt 0 Interrupt request select bit
iio2ie.b1 1
iio2ie.tm12e_po12e 2 II/O time measurement / waveform generation 2
iio2ie.b3 3
iio2ie.g1rie 4 II/O communication unit 1 HDLC data processing function interrupt
iio2ie.sio1re 5 II/O communication unit 1 receive interrupt
iio3ie 0xb3 Interrupt enable register 3
iio3ie.irlt 0 Interrupt request select bit
iio3ie.b1 1
iio3ie.tm10e_po10e 2 II/O time measurement / waveform generation 0
iio3ie.b3 3
iio3ie.g1toe 4 II/O communication unit 1 HDLC data processing function interrupt
iio3ie.sio1te 5 II/O communication unit 0 transmit interrupt
iio4ie 0xb4 Interrupt enable register 4
iio4ie.irlt_iio4ie 0 Interrupt request select bit
iio4ie.b1 1
iio4ie.tm17e_po17e 2 II/O time measurement / waveform generation 7
iio4ie.b3 3
iio4ie.bt1e 4 II/O communication base timer interrupt
iio4ie.b5 5
iio4ie.srt1e 6 II/O special communication function interrupt
iio4ie.srt0e 7 II/O special communication function interrupt
g0rb 0xe8 SI/O receive buffer register 0
g0rb.oer 12 Overrun error flag
g0dr 0xea Receive data register 0
g0ri 0xec Receive input register 0
g0mr 0xed SI/O communication control register 0
g0mr.gmd0 0 (b1-b0) Communication mode select bit
g0mr.gmd1 1 (b1-b0) Communication mode select bit
g0mr.ckdir 2 Internal/external clock select bit
g0mr.b3 3
g0mr.b4 4
g0mr.b5 5
g0mr.uform 6 Transfer direction select bit
g0mr.irs 7 Transmit interrupt cause select bit
g0to 0xee Transmit output register 0
g0cr 0xef SI/O communication control register 0
g0cr.ti 0 Transmit buffer empty flag
g0cr.txept 1 Transmit register empty flag
g0cr.ri 2 Receive complete flag
g0cr.b3 3
g0cr.te 4 Transmit enable bit
g0cr.re 5 Receive enable bit
g0cr.ipol 6 ISRxD input polarity switch bit
g0cr.opol 7 ISTxD output polarity switch bit
g0cmp0 0xf0 Data compare register 00
g0cmp1 0xf1 Data compare register 01
g0cmp2 0xf2 Data compare register 02
g0cmp3 0xf3 Data compare register 03
g0msk0 0xf4 Data mask register 00
g0msk1 0xf5 Data mask register 01
ccs 0xf6 Communication clock select register
ccs.ccs0 0 Communication unit 0 clock select bit
ccs.ccs1 1 Communication unit 0 clock select bit
ccs.ccs2 2 Communication unit 1 clock select bit
ccs.ccs3 3 Communication unit 1 clock select bit
g0rcrcl 0xf8 Receive CRC code register 0 low
g0rcrch 0xf9 Receive CRC code register 0 high
g0tcrcl 0xfa Transmit CRC code register 0 low
g0tcrch 0xfb Transmit CRC code register 0 high
g0emr 0xfc SI/O expansion mode register 0
g0emr.crcv 1 CRC default value select bit
g0emr.acrc 2 CRC reset select bit
g0emr.bsint 3 Bit stuffing error interrupt select bit
g0emr.rxsl 4 Receive source switch bit
g0emr.txsl 5 Transmit source switch bit
g0emr.crc0 6 CRC generation polynomial select bit
g0emr.crc1 7 CRC generation polynomial select bit
g0erc 0xfd SI/O expansion receive control register 0
g0erc.cmp0e 0 Data compare function 0 select bit
g0erc.cmp1e 1 Data compare function 1 select bit
g0erc.cmp2e 2 Data compare function 2 select bit
g0erc.cmp3e 3 Data compare function 3 select bit
g0erc.rcrce 4 Receive CRC enable bit
g0erc.rshte 5 Receive shift operation enable bit
g0erc.rbsf0 6 Receive bit stuffing "1" delete select bit
g0erc.rbsf1 7 Receive bit stuffing "0" delete select bit
g0irf 0xfe SI/O special communication interrupt detect register 0
g0irf.bserr 2 Bit stuffing error detect flag
g0irf.b3 3
g0irf.irf0 4 Interrupt cause determination flag 0
g0irf.irf1 5 Interrupt cause determination flag 1
g0irf.irf2 6 Interrupt cause determination flag 2
g0irf.irf3 7 Interrupt cause determination flag 3
g0etc 0xff SI/O expansion transmit control register 0
g0etc.tcrce 4 Transmit CRC enable bit
g0etc.b5 5
g0etc.tbsf0 6 Transmit bit stuffing "1" insert select bit
g0etc.tbsf1 7 Transmit bit stuffing "0" insert select bit
g1rb 0x128 SI/O receive buffer register 1
g1rb.oer 12 Overrun error flag
g1rb.fer 13 Framing error flag
g1rb.per 14 Parity error flag
g1dr 0x12a Receive data register 1
g1ri 0x12c Receive input register 1
g1mr 0x12d SI/O communication mode register 1
g1mr.gmd0 0 (b1-b0) Communication mode select bit
g1mr.gmd1 1 (b1-b0) Communication mode select bit
g1mr.ckdir 2 Internal/external clock select bit
g1mr.stps 3 Stop bit length select bit
g1mr.pry 4 Odd/Even parity select bit
g1mr.prye 5 Parity enable bit
g1mr.uform 6 Transfer direction select bit
g1mr.irs 7 Transmit interrupt cause select bit
g1to 0x12e Transmit output register 1
g1cr 0x12f SI/O communication control register 1
g1cr.ti 0 Transmit buffer empty flag
g1cr.txept 1 Transmit register empty flag
g1cr.ri 2 Receive complete flag
g1cr.b3 3
g1cr.te 4 Transmit enable bit
g1cr.re 5 Receive enable bit
g1cr.ipol 6 ISRxD input polarity switch bit
g1cr.opol 7 ISTxD output polarity switch bit
g1cmp0 0x130 Data compare register 10
g1cmp1 0x131 Data compare register 11
g1cmp2 0x132 Data compare register 12
g1cmp3 0x133 Data compare register 13
g1msk0 0x134 Data mask register 10
g1msk1 0x135 Data mask register 11
g1rcrcl 0x138 Receive CRC code register 1 low
g1rcrch 0x139 Receive CRC code register 1 high
g1tcrcl 0x13a Transmit CRC code register 1 low
g1tcrch 0x13b Transmit CRC code register 1 high
g1emr 0x13c SI/O extended mode register 1
g1emr.smode 0 Synchronouse mode select bit
g1emr.crcv 1 CRC initial value select bit
g1emr.acrc 2 CRC initialization select bit
g1emr.bsint 3 Bit stuffing error interrupt select bit
g1emr.rxsl 4 Receive source switch bit
g1emr.txsl 5 Transmit source switch bit
g1emr.crc0 6 CRC generation polynomial select bit
g1emr.crc1 7 CRC generation polynomial select bit
g1erc 0x13d SI/O extended receive control register 1
g1erc.cmp0e 0 Data compare function 0 select bit
g1erc.cmp1e 1 Data compare function 1 select bit
g1erc.cmp2e 2 Data compare function 2 select bit
g1erc.cmp3e 3 Data compare function 3 select bit
g1erc.rcrce 4 Receive CRC enable bit
g1erc.rshte 5 Receive shift operation enable bit
g1erc.rbsf0 6 Receive bit stuffing "1" delete select bit
g1erc.rbsf1 7 Receive bit stuffing "0" delete select bit
g1irf 0x13e SI/O special communication interrupt detect register 1
g1irf.bserr 2 Bit stuffing error detect flag
g1irf.abt 3 Arbitration lost detect flag
g1irf.irf0 4 Interrupt cause determination flag 0
g1irf.irf1 5 Interrupt cause determination flag 1
g1irf.irf2 6 Interrupt cause determination flag 2
g1irf.irf3 7 Interrupt cause determination flag 3
g1etc 0x13f SI/O extended transmit control register 1
g1etc.sof 3 SOF transmit request bit
g1etc.tcrce 4 Transmit CRC enable bit
g1etc.abte 5 Arbitration enable bit
g1etc.tbsf0 6 Transmit bit stuffing "1" insert select bit
g1etc.tbsf1 7 Transmit bit stuffing "0" insert select bit
y0r 0x2c0 Y0 register
y1r 0x2c2 Y1 register
y2r 0x2c4 Y2 register
y3r 0x2c6 Y3 register
y4r 0x2c8 Y4 register
y5r 0x2ca Y5 register
y6r 0x2cc Y6 register
y7r 0x2ce Y7 register
y8r 0x2d0 Y8 register
y9r 0x2d2 Y9 register
y10r 0x2d4 Y10 register
y11r 0x2d6 Y11 register
y12r 0x2d8 Y12 register
y13r 0x2da Y13 register
y14r 0x2dc Y14 register
y15r 0x2de Y15 register
xyc 0x2e0 X-Y control register
xyc.xyc0 0 Read-mode set bit
xyc.xyc1 1 Write-mode set bit
u1smr4 0x2e4 UART1 special mode register 4
u1smr3 0x2e5 UART1 special mode register 3
u1smr2 0x2e6 UART1 special mode register 2
u1smr 0x2e7 UART1 special mode register
u1mr 0x2e8 UART1 transmit/receive mode register
u1brg 0x2e9 UART1 bit rate generator
u1tbl 0x2ea UART1 transmit buffer register low
u1tbh 0x2eb UART1 transmit buffer register high
u1c0 0x2ec UART1 transmit/receive control register 0
u1c1 0x2ed UART1 transmit/receive control register 1
u1rb 0x2ee UART1 receive buffer register
u4smr4 0x2f4 UART4 special mode register 4
u4smr3 0x2f5 UART4 special mode register 3
u4smr2 0x2f6 UART4 special mode register 2
u4smr 0x2f7 UART4 special mode register
u4mr 0x2f8 UART4 transmit/receive mode register
u4brg 0x2f9 UART4 bit rate generator
u4tbl 0x2fa UART4 transmit buffer register low
u4tbh 0x2fb UART4 transmit buffer register high
u4c0 0x2fc UART4 transmit/receive control register 0
u4c1 0x2fd UART4 transmit/receive control register 1
u4rb 0x2fe UART4 receive buffer register
tbsr 0x300 Timer B3,4,5 count start flag
tbsr.tb3s 5 Timer B3 count start flag
tbsr.tb4s 6 Timer B4 count start flag
tbsr.tb5s 7 Timer B5 count start flag
ta11 0x302 Timer A1-1 register
ta21 0x304 Timer A2-1 register
ta41 0x306 Timer A4-1 register
invc0 0x308 Three-phase PWM control register 0
invc0.inv00 0 Interrupt enable output polarity select bit
invc0.inv01 1 Interrupt enable output specification bit
invc0.inv02 2 Mode select bit
invc0.inv03 3 Output control bit
invc0.inv04 4 Positive & negative phases concurrent active disable function enable bit
invc0.inv05 5 Positive & negative phases concurrent active output detect flag
invc0.inv06 6 Modulation mode select bit
invc0.inv07 7 Software trigger select bit
invc1 0x309 Three-phase PWM control register 1
invc1.inv10 0 Timer A1,A2 and A4 start trigger select bit
invc1.inv11 1 Timer A1-1,A2-1,A4-1 control bit
invc1.inv12 2 Dead time timer count source select bit
invc1.inv13 3 Carrier wave detect flag
invc1.inv14 4 Output polarity control bit
invc1.inv15 5 Dead time disable bit
invc1.inv16 6 Dead time timer trigger select bit
idb0 0x30a Three-phase output buffer register 0
idb0.du0 0 U-phase output buffer 0
idb0.dub0 1 ~U-phase output buffer 0
idb0.dv0 2 V-phase output buffer 0
idb0.dvb0 3 ~V-phase output buffer 0
idb0.dw0 4 W-phase output buffer 0
idb0.dwb0 5 ~W-phase output buffer 0
idb1 0x30b Three-phase output buffer register 1
idb1.du1 0 U-phase output buffer 1
idb1.dub1 1 ~U-phase output buffer 1
idb1.dv1 2 V-phase output buffer 1
idb1.dvb1 3 ~V-phase output buffer 1
idb1.dw1 4 W-phase output buffer 1
idb1.dwb1 5 ~W-phase output buffer 1
dtt 0x30c Dead time timer
ictb2 0x30d Timer B2 interrupt occurrences frequency set counter
ictb2.b0 0 (b3-b0) divisor
ictb2.b1 1 (b3-b0) divisor
ictb2.b2 2 (b3-b0) divisor
ictb2.b3 3 (b3-b0) divisor
tb3 0x310 Timer B3 register
tb4 0x312 Timer B4 register
tb5 0x314 Timer B5 register
tb3mr 0x31b Timer B3 mode register
tb4mr 0x31c Timer B4 mode register
tb5mr 0x31d Timer B5 mode register
ifsr 0x31f External interrupt request cause select register
ifsr.ifsr0 0 INT0 interrupt polarity select bit
ifsr.ifsr1 1 INT1 interrupt polarity select bit
ifsr.ifsr2 2 INT2 interrupt polarity select bit
ifsr.ifsr3 3 INT3 interrupt polarity select bit
ifsr.ifsr4 4 INT4 interrupt polarity select bit
ifsr.ifsr5 5 INT5 interrupt polarity select bit
ifsr.ifsr6 6 UART0,3 interrupt cause select bit
ifsr.ifsr7 7 UART1,4 interrupt cause select bit
u3smr4 0x324 UART3 special mode register 4
u3smr3 0x325 UART3 special mode register 3
u3smr2 0x326 UART3 special mode register 2
u3smr 0x327 UART3 special mode register
u3mr 0x328 UART3 transmit/receive mode register
u3brg 0x329 UART3 bit rate generator
u3tbl 0x32a UART3 transmit buffer register low
u3tbh 0x32b UART3 transmit buffer register high
u3c0 0x32c UART3 transmit/receive control register 0
u3c1 0x32d UART3 transmit/receive control register 1
u3rb 0x32e UART3 receive buffer register
u2smr4 0x334 UART2 special mode register 4
u2smr3 0x335 UART2 special mode register 3
u2smr2 0x336 UART2 special mode register 2
u2smr 0x337 UART2 special mode register
u2mr 0x338 UART2 transmit/receive mode register
u2brg 0x339 UART2 bit rate generator
u2tbl 0x33a UART2 transmit buffer register low
u2tbh 0x33b UART2 transmit buffer register high
u2c0 0x33c UART2 transmit/receive control register 0
u2c1 0x33d UART2 transmit/receive control register 1
u2rb 0x33e UART2 receive buffer register
tabsr 0x340 Count start flag
tabsr.ta0s 0 Timer A0 count start flag
tabsr.ta1s 1 Timer A1 count start flag
tabsr.ta2s 2 Timer A2 count start flag
tabsr.ta3s 3 Timer A3 count start flag
tabsr.ta4s 4 Timer A4 count start flag
tabsr.tb0s 5 Timer B0 count start flag
tabsr.tb1s 6 Timer B1 count start flag
tabsr.tb2s 7 Timer B2 count start flag
cpsrf 0x341 Clock prescaler reset flag
cpsrf.cpsr 7 Clock prescaler reset flag
onsf 0x342 One-shot start flag
onsf.ta0os 0 Timer A0 one-shot start flag
onsf.ta1os 1 Timer A1 one-shot start flag
onsf.ta2os 2 Timer A2 one-shot start flag
onsf.ta3os 3 Timer A3 one-shot start flag
onsf.ta4os 4 Timer A4 one-shot start flag
onsf.tazie 5 Z-phase input enable bit
onsf.ta0tgl 6 Timer A0 event/trigger select bit
onsf.ta0tgh 7 Timer A0 event/trigger select bit
trgsr 0x343 Trigger select register
trgsr.ta1tgl 0 Timer A1 event/trigger select bit
trgsr.ta1tgh 1 Timer A1 event/trigger select bit
trgsr.ta2tgl 2 Timer A2 event/trigger select bit
trgsr.ta2tgh 3 Timer A2 event/trigger select bit
trgsr.ta3tgl 4 Timer A3 event/trigger select bit
trgsr.ta3tgh 5 Timer A3 event/trigger select bit
trgsr.ta4tgl 6 Timer A4 event/trigger select bit
trgsr.ta4tgh 7 Timer A4 event/trigger select bit
udf 0x344 Up/down flag
udf.ta0ud 0 Timer A0 up/down flag
udf.ta1ud 1 Timer A1 up/down flag
udf.ta2ud 2 Timer A2 up/down flag
udf.ta3ud 3 Timer A3 up/down flag
udf.ta4ud 4 Timer A4 up/down flag
udf.ta2p 5 Timer A2 2-phase pulse signal processing function select bit
udf.ta3p 6 Timer A3 2-phase pulse signal processing function select bit
udf.ta4p 7 Timer A4 2-phase pulse signal processing function select bit
ta0 0x346 Timer A0 register
ta1 0x348 Timer A1 register
ta2 0x34a Timer A2 register
ta3 0x34c Timer A3 register
ta4 0x34e Timer A4 register
tb0 0x350 Timer B0 register
tb1 0x352 Timer B1 register
tb2 0x354 Timer B2 register
ta0mr 0x356 Timer A0 mode register
ta1mr 0x357 Timer A1 mode register
ta2mr 0x358 Timer A2 mode register
ta3mr 0x359 Timer A3 mode register
ta4mr 0x35a Timer A4 mode register
tb0mr 0x35b Timer B0 mode register
tb1mr 0x35c Timer B1 mode register
tb2mr 0x35d Timer B2 mode register
tb2sc 0x35e Timer B2 special mode register
tb2sc.pwcon 0 Timer B2 reload timing switching bit
tcspr 0x35f Count source prescaler register
tcspr.cnt0 0 (b3-b0) Divide ratio select bit
tcspr.cnt1 1 (b3-b0) Divide ratio select bit
tcspr.cnt2 2 (b3-b0) Divide ratio select bit
tcspr.cnt3 3 (b3-b0) Divide ratio select bit
tcspr.b4 4
tcspr.b5 5
tcspr.b6 6
tcspr.cst 7 Operation enable bit
u0smr4 0x364 UART0 special mode register 4
u0smr4.stareq 0 Start condition generate bit
u0smr4.rstareq 1 Restart condition generate bit
u0smr4.stpreq 2 Stop condition generate bit
u0smr4.stspsel 3 SCL, SDA output select bit
u0smr4.ackd 4 ACK data bit
u0smr4.ackc 5 ACK data output enable bit
u0smr4.sclhi 6 SCL output stop enable bit
u0smr4.swc9 7 SCL wait output bit
u0smr3 0x365 UART0 special mode register 3
u0smr3.sse 0 SS pin function enable bit
u0smr3.ckph 1 Clock-phase set bit
u0smr3.dinc 2 Serial input port set bit
u0smr3.nodc 3 Clock output select bit
u0smr3.err 4 Fault error flag
u0smr3.dl0 5 (b7-b5) SDAi digital delay time set bit
u0smr3.dl1 6 (b7-b5) SDAi digital delay time set bit
u0smr3.dl2 7 (b7-b5) SDAi digital delay time set bit
u0smr2 0x366 UART0 special mode register 2
u0smr2.iicm2 0 IIC mode select bit2
u0smr2.csc 1 Clock synchronous bit
u0smr2.swc 2 SCL wait output bit
u0smr2.als 3 SDA output stop bit
u0smr2.stc 4 UARTi initialize bit
u0smr2.swc2 5 SCL wait output bit2
u0smr2.sdhi 6 SDA output inhibit bit
u0smr2.su1him 7 External clock synchronous enable bit
u0smr 0x367 UART0 special mode register
u0smr.iicm 0 IIC mode select bit
u0smr.abc 1 Arbitration lost detect flag control bit
u0smr.bbs 2 Bus busy flag
u0smr.lsyn 3 SCLL sync output enable bit
u0smr.abscs 4 Bus conflict detect sampling clock select bit
u0smr.acse 5 Auto clear function select bit for transmit enable bit
u0smr.sss 6 Transmit start condition select bit
u0smr.sclkdiv 7 Clock divide synchronous bit
u0mr 0x368 UART0 transmit/receive mode register
u0mr.smd0 0 Serial I/O mode select bit
u0mr.smd1 1 Serial I/O mode select bit
u0mr.smd2 2 Serial I/O mode select bit
u0mr.ckdir 3 Internal/external clock select bit
u0mr.stps 4 Stop bit length select bit
u0mr.pry 5 Odd/even parity select bit
u0mr.prye 6 Parity enable bit
u0mr.iopol 7 TxD RxD I/O polarity switch bit
u0brg 0x369 UART0 bit rate generator
u0tbl 0x36a UART0 transmit buffer register low
u0tbh 0x36b UART0 transmit buffer register high
u0c0 0x36c UART0 transmit/receive control register 0
u0c0.clk0 0 BRG count source select bit
u0c0.clk1 1 BRG count source select bit
u0c0.crs 2 CTS~/RTS~ function select bit
u0c0.txept 3 Transmit register empty flag
u0c0.crd 4 CTS~/RTS~ disable bit
u0c0.nch 5 Data output select bit
u0c0.ckpol 6 CLK polarity select bit
u0c0.uform 7 Transfer format select bit
u0c1 0x36d UART0 transmit/receive control register 1
u0c1.te 0 Transmit enable bit
u0c1.ti 1 Transmit buffer empty flag
u0c1.re 2 Receive enable bit
u0c1.ri 3 Receive complete flag
u0c1.u0irs 4 UARTi transmit interrupt cause select bit
u0c1.u0rrm 5 UARTi continuous receive mode enable bit
u0c1.u0lch 6 Data logic select bit
u0c1.sclkstpb_u0ere 7 Clock divide synchronizing stop bit / Error signal output enable bit
u0rb 0x36e UART0 receive buffer register
u0rb.abt 11 Arbitration lost detect flag
u0rb.oer 12 Overrun error flag
u0rb.fer 13 Framing error flag
u0rb.per 14 Parity error flag
u0rb.sum 15 Error sum flag
dm0sl 0x378 DMA0 cause select register
dm0sl.dsel0 0 DMA request cause select bit
dm0sl.dsel1 1 DMA request cause select bit
dm0sl.dsel2 2 DMA request cause select bit
dm0sl.dsel3 3 DMA request cause select bit
dm0sl.dsel4 4 DMA request cause select bit
dm0sl.dsr 5 Software DMA request bit
dm0sl.b6 6
dm0sl.drq 7 DMA request bit
dm1sl 0x379 DMA1 cause select register
dm2sl 0x37a DMA1 cause select register
dm3sl 0x37b DMA1 cause select register
crcdl 0x37c CRC data register low
crcdh 0x37d CRC data register high
crcin 0x37e CRC input register
ad00l 0x380 A/D0 register 0 low
ad00h 0x381 A/D0 register 0 high
ad01l 0x382 A/D0 register 1 low
ad01h 0x383 A/D0 register 1 high
ad02l 0x384 A/D0 register 2 low
ad02h 0x385 A/D0 register 2 high
ad03l 0x386 A/D0 register 3 low
ad03h 0x387 A/D0 register 3 high
ad04l 0x388 A/D0 register 4 low
ad04h 0x389 A/D0 register 4 high
ad05l 0x38a A/D0 register 5 low
ad05h 0x38b A/D0 register 5 high
ad06l 0x38c A/D0 register 6 low
ad06h 0x38d A/D0 register 6 high
ad07l 0x38e A/D0 register 7 low
ad07h 0x38f A/D0 register 7 high
ad0con2 0x394 A/D0 control register 2
ad0con2.smp 0 A/D conversion method select bit
ad0con2.aps0 1 Analog input port select bit
ad0con2.aps1 2 Analog input port select bit
ad0con2.b3 3
ad0con2.b4 4
ad0con2.trg0 5 External trigger request cause select bit
ad0con3 0x395 A/D0 control register 3
ad0con3.dus 0 DMAC operation select bit
ad0con3.mss 1 Multi-port sweep mode select bit
ad0con3.cks2 2 Frequency select bit
ad0con3.msf0 3 Multi-port sweep status flag
ad0con3.msf1 4 Multi-port sweep status flag
ad0con0 0x396 A/D0 control register 0
ad0con0.ch0 0 Analog input pin select bit
ad0con0.ch1 1 Analog input pin select bit
ad0con0.ch2 2 Analog input pin select bit
ad0con0.md0 3 A/D operation mode select bit 0
ad0con0.md1 4 A/D operation mode select bit 0
ad0con0.trg 5 Trigger select bit
ad0con0.adst 6 A/D conversion start flag
ad0con0.cks0 7 Frequency select bit 0
ad0con1 0x397 A/D0 control register 1
ad0con1.scan0 0 A/D sweep pin select bit
ad0con1.scan1 1 A/D sweep pin select bit
ad0con1.md2 2 A/D operation mode select bit 1
ad0con1.bits 3 8/10-bit mode select bit
ad0con1.cks1 4 Frequency select bit 1
ad0con1.vcut 5 Vref connection bit
ad0con1.opa0 6 External op-amp connection mode bit
ad0con1.opa1 7 External op-amp connection mode bit
da0 0x398 D/A register 0
da1 0x39a D/A register 1
dacon 0x39c D/A control register
dacon.da0e 0 D/A0 output enable bit
dacon.da1e 1 D/A1 output enable bit
psd1 0x3a7 Function select register D1
psd1.psd1_0 0 Port P70 output peripheral function select bit
psd1.psd1_1 1 Port P71 output peripheral function select bit
psd1.psd1_2 2
psd1.psd1_3 3
psd1.psd1_4 4
psd1.psd1_5 5
psd1.psd1_6 6 Port P76 output peripheral function select bit
psc3 0x3ad Function select register C3
psc3.psc3_6 6 Port P96 output peripheral function select bit
psc 0x3af Function select register C
psc.psc_0 0 Port P70 output peripheral function select bit
psc.psc_1 1 Port P71 output peripheral function select bit
psc.psc_2 2 Port P72 output peripheral function select bit
psc.psc_3 3 Port P73 output peripheral function select bit
psc.psc_4 4 Port P74 output peripheral function select bit
psc.psc_5 5
psc.psc_6 6 Port P76 output peripheral function select bit
psc.psc_7 7 Port Key input interrupt disable bit
ps0 0x3b0 Function select register A0
ps0.ps0_0 0 Port P60 output function select bit
ps0.ps0_1 1 Port P61 output function select bit
ps0.ps0_2 2 Port P62 output function select bit
ps0.ps0_3 3 Port P63 output function select bit
ps0.ps0_4 4 Port P64 output function select bit
ps0.ps0_5 5 Port P65 output function select bit
ps0.ps0_6 6 Port P66 output function select bit
ps0.ps0_7 7 Port P67 output function select bit
ps1 0x3b1 Function select register A1
ps1.ps1_0 0 Port P70 output function select bit
ps1.ps1_1 1 Port P71 output function select bit
ps1.ps1_2 2 Port P72 output function select bit
ps1.ps1_3 3 Port P73 output function select bit
ps1.ps1_4 4 Port P74 output function select bit
ps1.ps1_5 5 Port P75 output function select bit
ps1.ps1_6 6 Port P76 output function select bit
ps1.ps1_7 7 Port P77 output function select bit
psl0 0x3b2 Function select register B0
psl0.psl0_2 2 Port P62 output peripheral function select bit
psl0.psl0_3 3
psl0.psl0_4 4 Port P64 output peripheral function select bit
psl0.psl0_5 5
psl0.psl0_6 6 Port P66 output peripheral function select bit
psl1 0x3b3 Function select register B1
psl1.psl1_0 0 Port P70 output peripheral function select bit
psl1.psl1_1 1 Port P71 output peripheral function select bit
psl1.psl1_2 2 Port P72 output peripheral function select bit
psl1.psl1_3 3 Port P73 output peripheral function select bit
psl1.psl1_4 4 Port P74 output peripheral function select bit
psl1.psl1_5 5 Port P75 output peripheral function select bit
psl1.psl1_6 6 Port P76 output peripheral function select bit
psl1.psl1_7 7 Port P77 output peripheral function select bit
ps2 0x3b4 Function select register A2
ps2.ps2_0 0 Port P80 output function select bit
ps2.ps2_1 1 Port P81 output function select bit
ps2.ps2_2 2 Port P82 output function select bit
ps3 0x3b5 Function select register A3
ps3.ps3_0 0 Port P90 output function select bit
ps3.ps3_1 1 Port P91 output function select bit
ps3.ps3_2 2 Port P92 output function select bit
ps3.ps3_3 3 Port P93 output function select bit
ps3.ps3_4 4 Port P94 output function select bit
ps3.ps3_5 5 Port P95 output function select bit
ps3.ps3_6 6 Port P96 output function select bit
ps3.ps3_7 7 Port P97 output function select bit
psl2 0x3b6 Function select register B2
psl2.psl2_0 0 Port P80 output peripheral function select bit
psl2.psl2_1 1 Port P81 output peripheral function select bit
psl2.psl2_2 2 Port P82 output peripheral function select bit
psl3 0x3b7 Function select register B3
psl3.psl3_1 1 Port P91 output peripheral function select bit
psl3.psl3_2 2 Port P92 output peripheral function select bit
psl3.psl3_3 3 Port P93 output peripheral function select bit
psl3.psl3_4 4 Port P94 output peripheral function select bit
psl3.psl3_5 5 Port P95 output peripheral function select bit
psl3.psl3_6 6 Port P96 output peripheral function select bit
psl3.psl3_7 7 Port P97 output peripheral function select bit
p6 0x3c0 Port P6 register
p6.p6_0 0 Port P6 bit0
p6.p6_1 1 Port P6 bit1
p6.p6_2 2 Port P6 bit2
p6.p6_3 3 Port P6 bit3
p6.p6_4 4 Port P6 bit4
p6.p6_5 5 Port P6 bit5
p6.p6_6 6 Port P6 bit6
p6.p6_7 7 Port P6 bit7
p7 0x3c1 Port P7 register
p7.p7_0 0 Port P7 bit0
p7.p7_1 1 Port P7 bit1
p7.p7_2 2 Port P7 bit2
p7.p7_3 3 Port P7 bit3
p7.p7_4 4 Port P7 bit4
p7.p7_5 5 Port P7 bit5
p7.p7_6 6 Port P7 bit6
p7.p7_7 7 Port P7 bit7
pd6 0x3c2 Port P6 direction register
pd6.pd6_0 0 P6 direction register bit0
pd6.pd6_1 1 P6 direction register bit1
pd6.pd6_2 2 P6 direction register bit2
pd6.pd6_3 3 P6 direction register bit3
pd6.pd6_4 4 P6 direction register bit4
pd6.pd6_5 5 P6 direction register bit5
pd6.pd6_6 6 P6 direction register bit6
pd6.pd6_7 7 P6 direction register bit7
pd7 0x3c3 Port P7 direction register
pd7.pd7_0 0 P7 direction register bit0
pd7.pd7_1 1 P7 direction register bit1
pd7.pd7_2 2 P7 direction register bit2
pd7.pd7_3 3 P7 direction register bit3
pd7.pd7_4 4 P7 direction register bit4
pd7.pd7_5 5 P7 direction register bit5
pd7.pd7_6 6 P7 direction register bit6
pd7.pd7_7 7 P7 direction register bit7
p8 0x3c4 Port P8 register
p8.p8_0 0 Port P8 bit0
p8.p8_1 1 Port P8 bit1
p8.p8_2 2 Port P8 bit2
p8.p8_3 3 Port P8 bit3
p8.p8_4 4 Port P8 bit4
p8.p8_5 5 Port P8 bit5
p8.p8_6 6 Port P8 bit6
p8.p8_7 7 Port P8 bit7
p9 0x3c5 Port P9 register
p9.p9_0 0 Port P9 bit0
p9.p9_1 1 Port P9 bit1
p9.p9_2 2 Port P9 bit2
p9.p9_3 3 Port P9 bit3
p9.p9_4 4 Port P9 bit4
p9.p9_5 5 Port P9 bit5
p9.p9_6 6 Port P9 bit6
p9.p9_7 7 Port P9 bit7
pd8 0x3c6 Port P8 direction register
pd8.pd8_0 0 P8 direction register bit0
pd8.pd8_1 1 P8 direction register bit1
pd8.pd8_2 2 P8 direction register bit2
pd8.pd8_3 3 P8 direction register bit3
pd8.pd8_4 4 P8 direction register bit4
pd8.pd8_5 5
pd8.pd8_6 6 P8 direction register bit6
pd8.pd8_7 7 P8 direction register bit7
pd9 0x3c7 Port P9 direction register
pd9.pd9_0 0 P9 direction register bit0
pd9.pd9_1 1 P9 direction register bit1
pd9.pd9_2 2 P9 direction register bit2
pd9.pd9_3 3 P9 direction register bit3
pd9.pd9_4 4 P9 direction register bit4
pd9.pd9_5 5 P9 direction register bit5
pd9.pd9_6 6 P9 direction register bit6
pd9.pd9_7 7 P9 direction register bit7
p10 0x3c8 Port P10 register
p10.p10_0 0 Port P10 bit0
p10.p10_1 1 Port P10 bit1
p10.p10_2 2 Port P10 bit2
p10.p10_3 3 Port P10 bit3
p10.p10_4 4 Port P10 bit4
p10.p10_5 5 Port P10 bit5
p10.p10_6 6 Port P10 bit6
p10.p10_7 7 Port P10 bit7
pd10 0x3ca Port P10 direction register
pd10.pd10_0 0 P10 direction register bit0
pd10.pd10_1 1 P10 direction register bit1
pd10.pd10_2 2 P10 direction register bit2
pd10.pd10_3 3 P10 direction register bit3
pd10.pd10_4 4 P10 direction register bit4
pd10.pd10_5 5 P10 direction register bit5
pd10.pd10_6 6 P10 direction register bit6
pd10.pd10_7 7 P10 direction register bit7
pur3 0x3db Pull-up control register 3
pur3.pu30 0 Pull-up P100 to P103
pur3.pu31 1 Pull-up P104 to P107
pur3.pu32 2 Pull-up P110 to P113
pur3.pu33 3 Pull-up P114
pur3.pu34 4 Pull-up P120 to P123
pur3.pu35 5 Pull-up P124 to P127
pur3.pu36 6 Pull-up P130 to P133
pur3.pu37 7 Pull-up P134 to P137
pur4 0x3dc Pull-up control register 4
pur4.pu40 0 Pull-up P140 to P143
pur4.pu41 1 Pull-up P144 to P146
pur4.pu42 2 Pull-up P150 to P153
pur4.pu43 3 Pull-up P154 to P157
p0 0x3e0 Port P0 register
p0.p0_0 0 Port P0 bit0
p0.p0_1 1 Port P0 bit1
p0.p0_2 2 Port P0 bit2
p0.p0_3 3 Port P0 bit3
p0.p0_4 4 Port P0 bit4
p0.p0_5 5 Port P0 bit5
p0.p0_6 6 Port P0 bit6
p0.p0_7 7 Port P0 bit7
p1 0x3e1 Port P1 register
p1.p1_0 0 Port P1 bit0
p1.p1_1 1 Port P1 bit1
p1.p1_2 2 Port P1 bit2
p1.p1_3 3 Port P1 bit3
p1.p1_4 4 Port P1 bit4
p1.p1_5 5 Port P1 bit5
p1.p1_6 6 Port P1 bit6
p1.p1_7 7 Port P1 bit7
pd0 0x3e2 Port P0 direction register
pd0.pd0_0 0 P0 direction register bit0
pd0.pd0_1 1 P0 direction register bit1
pd0.pd0_2 2 P0 direction register bit2
pd0.pd0_3 3 P0 direction register bit3
pd0.pd0_4 4 P0 direction register bit4
pd0.pd0_5 5 P0 direction register bit5
pd0.pd0_6 6 P0 direction register bit6
pd0.pd0_7 7 P0 direction register bit7
pd1 0x3e3 Port P1 direction register
pd1.pd1_0 0 P1 direction register bit0
pd1.pd1_1 1 P1 direction register bit1
pd1.pd1_2 2 P1 direction register bit2
pd1.pd1_3 3 P1 direction register bit3
pd1.pd1_4 4 P1 direction register bit4
pd1.pd1_5 5 P1 direction register bit5
pd1.pd1_6 6 P1 direction register bit6
pd1.pd1_7 7 P1 direction register bit7
p2 0x3e4 Port P2 register
p2.p2_0 0 Port P2 bit0
p2.p2_1 1 Port P2 bit1
p2.p2_2 2 Port P2 bit2
p2.p2_3 3 Port P2 bit3
p2.p2_4 4 Port P2 bit4
p2.p2_5 5 Port P2 bit5
p2.p2_6 6 Port P2 bit6
p2.p2_7 7 Port P2 bit7
p3 0x3e5 Port P3 register
p3.p3_0 0 Port P3 bit0
p3.p3_1 1 Port P3 bit1
p3.p3_2 2 Port P3 bit2
p3.p3_3 3 Port P3 bit3
p3.p3_4 4 Port P3 bit4
p3.p3_5 5 Port P3 bit5
p3.p3_6 6 Port P3 bit6
p3.p3_7 7 Port P3 bit7
pd2 0x3e6 Port P2 direction register
pd2.pd2_0 0 P2 direction register bit0
pd2.pd2_1 1 P2 direction register bit1
pd2.pd2_2 2 P2 direction register bit2
pd2.pd2_3 3 P2 direction register bit3
pd2.pd2_4 4 P2 direction register bit4
pd2.pd2_5 5 P2 direction register bit5
pd2.pd2_6 6 P2 direction register bit6
pd2.pd2_7 7 P2 direction register bit7
pd3 0x3e7 Port P3 direction register
pd3.pd3_0 0 P3 direction register bit0
pd3.pd3_1 1 P3 direction register bit1
pd3.pd3_2 2 P3 direction register bit2
pd3.pd3_3 3 P3 direction register bit3
pd3.pd3_4 4 P3 direction register bit4
pd3.pd3_5 5 P3 direction register bit5
pd3.pd3_6 6 P3 direction register bit6
pd3.pd3_7 7 P3 direction register bit7
p4 0x3e8 Port P4 register
p4.p4_0 0 Port P4 bit0
p4.p4_1 1 Port P4 bit1
p4.p4_2 2 Port P4 bit2
p4.p4_3 3 Port P4 bit3
p4.p4_4 4 Port P4 bit4
p4.p4_5 5 Port P4 bit5
p4.p4_6 6 Port P4 bit6
p4.p4_7 7 Port P4 bit7
p5 0x3e9 Port P5 register
p5.p5_0 0 Port P5 bit0
p5.p5_1 1 Port P5 bit1
p5.p5_2 2 Port P5 bit2
p5.p5_3 3 Port P5 bit3
p5.p5_4 4 Port P5 bit4
p5.p5_5 5 Port P5 bit5
p5.p5_6 6 Port P5 bit6
p5.p5_7 7 Port P5 bit7
pd4 0x3ea Port P4 direction register
pd4.pd4_0 0 P4 direction register bit0
pd4.pd4_1 1 P4 direction register bit1
pd4.pd4_2 2 P4 direction register bit2
pd4.pd4_3 3 P4 direction register bit3
pd4.pd4_4 4 P4 direction register bit4
pd4.pd4_5 5 P4 direction register bit5
pd4.pd4_6 6 P4 direction register bit6
pd4.pd4_7 7 P4 direction register bit7
pd5 0x3eb Port P5 direction register
pd5.pd5_0 0 P5 direction register bit0
pd5.pd5_1 1 P5 direction register bit1
pd5.pd5_2 2 P5 direction register bit2
pd5.pd5_3 3 P5 direction register bit3
pd5.pd5_4 4 P5 direction register bit4
pd5.pd5_5 5 P5 direction register bit5
pd5.pd5_6 6 P5 direction register bit6
pd5.pd5_7 7 P5 direction register bit7
pur0 0x3f0 Pull-up control register 0
pur0.pu00 0 Pull-up P00 to P03
pur0.pu01 1 Pull-up P04 to P07
pur0.pu02 2 Pull-up P10 to P13
pur0.pu03 3 Pull-up P14 to P17
pur0.pu04 4 Pull-up P20 to P23
pur0.pu05 5 Pull-up P24 to P27
pur0.pu06 6 Pull-up P30 to P33
pur0.pu07 7 Pull-up P34 to P37
pur1 0x3f1 Pull-up control register 1
pur1.pu10 0 Pull-up P40 to P43
pur1.pu11 1 Pull-up P44 to P47
pur1.pu12 2 Pull-up P50 to P53
pur1.pu13 3 Pull-up P54 to P57
pcr 0x3ff Port control register
pcr.pcr0 0 Port P1 control bit