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idapro / opt / ida90 / libexec / idapro / cfg / ppc.cfg
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;
; This file defines the SPRs, DCRs, and MMIO for PowerPC devices.
; The register and I/O definitions are provided for each PPC device
; Each device definition begins with a line like this:
;
;       .devicename
;
;  SPR definitions use this format:
;
;       spr   sprname     sprnum
;
;  DCR definitions:
;
;       dcr   dcrname     dcrnum
;
;  MMIO register definitions:
;
;       portname        address
;
;  MMIO definitions in actual program will be added to the MMIO base value (defaults to 0)
;  The address of this area can be changed later in processor-specific options
;
; Lines beginning with a space are ignored.
; Comment lines should be started with ';' character.
;
; The default device is specified at the start of the file with the .default directive
;

;
; Additional directives:
;
; PROFILE=xxxx
;     xxxx may be SERVER or EMBEDDED.
; SIMD=xxxx
;     xxxx may be ALTIVEC, SPE, VMX128, or PAIRED, and represents the SIMD
;     instruction set used.
; MMIOBASE=xxxx
;     Use xxxx as the default MMIO base (add it to all MMIO register addresses to get the final address)
;

.default ppc

;generic PowerPC (default for non-binary files)
.ppc
;SIMD=ALTIVEC
;PROFILE=SERVER
;--------------------------------------
; Standard PowerPC SPR
spr   xer     1           Integer exception register
spr   lr      8           Link register
spr   ctr     9           Count register
spr   dsisr   18          DAE/source instruction service register
spr   dar     19          Data address register
spr   dec     22          Decrementer
spr   sdr1    25          SDR1 register
spr   srr0    26          Machine status save/restore register 0
spr   srr1    27          Machine status save/restore register 1
spr   eie     80          External interrupt enable
spr   eid     81          External interrupt disable
spr   nri     82          Non-recoverable interrupt
spr   cmpa    144         Comparator A value register
spr   cmpb    145         Comparator B value register
spr   cmpc    146         Comparator C value register
spr   cmpd    147         Comparator D value register
spr   ecr     148         Exception cause register
spr   der     149         Debug enable register
spr   counta  150         Breakpoint Counter A value and control register
spr   countb  151         Breakpoint Counter B value and control register
spr   cmpe    152         Comparator E value register
spr   cmpf    153         Comparator F value register
spr   cmpg    154         Comparator G value register
spr   cmph    155         Comparator H value register
spr   lctrl1  156         L-bus support control register 1
spr   lctrl2  157         L-bus support control register 2
spr   ictrl   158         I-bus support control register
spr   bar     159         Breakpoint address register
spr   vrsave  256         Vector Restore/Save
spr   tbl     268         Time base facility for reading (lower)
spr   tbu     269         Time base facility for reading (upper)
spr   sprg0   272         General special purpose register 0
spr   sprg1   273         General special purpose register 1
spr   sprg2   274         General special purpose register 2
spr   sprg3   275         General special purpose register 3
spr   asr     280         Address space register
spr   ear     282         External address register
spr   tblw    284         Time base facility for writing (lower)
spr   tbuw    285         Time base facility for writing (upper)
spr   pvr     287         Processor version register
spr   ibat0u  528         Instruction BAT register 0 (upper)
spr   ibat0l  529         Instruction BAT register 0 (lower)
spr   ibat1u  530         Instruction BAT register 1 (upper)
spr   ibat1l  531         Instruction BAT register 1 (lower)
spr   ibat2u  532         Instruction BAT register 2 (upper)
spr   ibat2l  533         Instruction BAT register 2 (lower)
spr   ibat3u  534         Instruction BAT register 3 (upper)
spr   ibat3l  535         Instruction BAT register 3 (lower)
spr   dbat0u  536         Data BAT register 0 (upper)
spr   dbat0l  537         Data BAT register 0 (lower)
spr   dbat1u  538         Data BAT register 1 (upper)
spr   dbat1l  539         Data BAT register 1 (lower)
spr   dbat2u  540         Data BAT register 2 (upper)
spr   dbat2l  541         Data BAT register 2 (lower)
spr   dbat3u  542         Data BAT register 3 (upper)
spr   dbat3l  543         Data BAT register 3 (lower)
;spr   iccsr   560         I-cache control and status register
;spr   icadr   561         I-cache address register
;spr   icdat   562         I-cache data port (read only)
spr   dpdr    630         Development port data register
spr   sia     780         Sampled Instruction Address
spr   sda     781         Sampled Data Address
;spr   pmc1    787         Performance Monitor Counter 1 (read only)
;spr   pmc2    788         Performance Monitor Counter 2 (read only)
;spr   pmc3    789         Performance Monitor Counter 3 (read only)
;spr   pmc4    790         Performance Monitor Counter 4 (read only)
;spr   pmc5    791         Performance Monitor Counter 5 (read only)
;spr   pmc6    792         Performance Monitor Counter 6 (read only)
;spr   pmc7    793         Performance Monitor Counter 7 (read only)
;spr   pmc8    794         Performance Monitor Counter 8 (read only)
;spr   mmcr0   795         Monitor Mode Control Register 0 (read only)
;spr   mmcr1   798         Monitor Mode Control Register 1 (read only)
spr   hid0    1008
spr   iabr    1010        Instruction address breakpoint register
spr   dabr    1013        Data address breakpoint register
spr   buscsr  1016
spr   l2cr    1017
spr   l2sr    1018
spr   fpecr   1022        Floating-point exception cause register
spr   pir     1023

spr   zpr    0x3b0     zone protection register         (403GC)
spr   pid    0x3b1     process id register              (403GC)
spr   smr    0x3b8     storage mem-coherent (not implemented)
spr   sgr    0x3b9     storage guarded register         (403GC)
spr   dcwr   0x3ba     data cache write-thru register   (403GC)
spr   tbhu   0x3cc     user-mode time base high         (403GC)
spr   tblu   0x3cd     user-mode time base low          (403GC)
spr   icdbdr 0x3d3     instruction cache debug data reg (403GC)
spr   esr    0x3d4     execption syndrome register
spr   dear   0x3d5     data exeption address register
spr   evpr   0x3d6     exeption vector prefix register
spr   cdbcr  0x3d7     cache debug control register     (403GC)
spr   tsr    0x3d8     timer status register
spr   tcr    0x3da     timer control register
spr   pit    0x3db     programmable interval timer
spr   tbhi   0x3dc     time base high
spr   tblo   0x3dd     time base low
spr   srr2   0x3de     save/restore register 2
spr   srr3   0x3df     save/restore register 3
;spr   dbsr   0x3f0     debug status register
;spr   dbcr   0x3f2     debug control register
spr   iac1   0x3f4     instruction address comparator 1
;spr   iac2   0x3f5     instruction address comparator 2
spr   dac1   0x3f6     data address comparator 1
spr   dac2   0x3f7     data address comparator 2
;spr   dccr   0x3fa     data cache control register
spr   iccr   0x3fb     instruction cache control register
spr   pbl1   0x3fc     protection bound lower 1
spr   pbu1   0x3fd     protection bound upper 1
;spr   pbl2   0x3fe     protection bound lower 2
;spr   pbu2   0x3ff     protection bound upper 2

;--------------------------------------
; Standard PowerPC DCR
dcr   exisr   0x040 External Interrupt Status Register
dcr   exier   0x042 External Interrupt Enable Register
dcr   brh0    0x070 Bank Register High 0
dcr   brh1    0x071 Bank Register High 1
dcr   brh2    0x072 Bank Register High 2
dcr   brh3    0x073 Bank Register High 3
dcr   brh4    0x074 Bank Register High 4
dcr   brh5    0x075 Bank Register High 5
dcr   brh6    0x076 Bank Register High 6
dcr   brh7    0x077 Bank Register High 7
dcr   br0     0x080 Bank Register 0
dcr   br1     0x081 Bank Register 1
dcr   br2     0x082 Bank Register 2
dcr   br3     0x083 Bank Register 3
dcr   br4     0x084 Bank Register 4
dcr   br5     0x085 Bank Register 5
dcr   br6     0x086 Bank Register 6
dcr   br7     0x087 Bank Register 7
dcr   bear    0x090 Bus Error Address Register
dcr   besr    0x091 Bus Error Syndrome Register
dcr   iocr    0x0A0 Input/Output Configuration Register
dcr   dmacc0  0x0C4 DMA Chained Count 0
dcr   dmacc1  0x0CC DMA Chained Count 1
dcr   dmacc2  0x0D4 DMA Chained Count 2
dcr   dmacc3  0x0DC DMA Chained Count 3
dcr   dmacr0  0x0C0 DMA Channel Control Register 0
dcr   dmacr1  0x0C8 DMA Channel Control Register 1
dcr   dmacr2  0x0D0 DMA Channel Control Register 2
dcr   dmacr3  0x0D8 DMA Channel Control Register 3
dcr   dmact0  0x0C1 DMA Count Register 0
dcr   dmact1  0x0C9 DMA Count Register 1
dcr   dmact2  0x0D1 DMA Count Register 2
dcr   dmact3  0x0D9 DMA Count Register 3
dcr   dmada0  0x0C2 DMA Destination Address Reg. 0
dcr   dmada1  0x0CA DMA Destination Address Reg. 1
dcr   dmada2  0x0D2 DMA Destination Address Reg. 2
dcr   dmada3  0x0DA DMA Destination Address Reg. 3
dcr   dmasa0  0x0C3 DMA Source Address Register 0
dcr   dmasa1  0x0CB DMA Source Address Register 1
dcr   dmasa2  0x0D3 DMA Source Address Register 2
dcr   dmasa3  0x0DB DMA Source Address Register 3
dcr   dmasr   0x0E0 DMA Status Register

.mpc860
PROFILE=EMBEDDED
;--------------------------------------
; Memory mapped I/O
; default MMIO base is 0 and can be changed by programming the IMMR SPR
MMIOBASE=0
SUIMCR     0x000  SIU Module Configuration Register
SYPCR      0x004  System Protection Control Register
SWSR       0x00E  Software Service Register
SIPEND     0x010  Interrupt Pending Register
SIMASK     0x014  Interrupt Mask Register
SIEL       0x018  Interrupt Edge Level Mask
SIVEC      0x01C  Interrupt Vector
TESR       0x020  Transfer Error Status Register
SDCR       0x030  SDMA Configuration Register

PBR0       0x080  PCMCIA Interface Base Register 0
POR0       0x084  PCMCIA Interface Option Register 0
PBR1       0x088  PCMCIA Interface Base Register 1
POR1       0x08C  PCMCIA Interface Option Register 1
PBR2       0x090  PCMCIA Interface Base Register 2
POR2       0x094  PCMCIA Interface Option Register 2
PBR3       0x098  PCMCIA Interface Base Register 3
POR3       0x09C  PCMCIA Interface Option Register 3
PBR4       0x0A0  PCMCIA Interface Base Register 4
POR4       0x0A4  PCMCIA Interface Option Register 4
PBR5       0x0A8  PCMCIA Interface Base Register 5
POR5       0x0AC  PCMCIA Interface Option Register 5
PBR6       0x0B0  PCMCIA Interface Base Register 6
POR6       0x0B4  PCMCIA Interface Option Register 6
PBR7       0x0B8  PCMCIA Interface Base Register 7
POR7       0x0BC  PCMCIA Interface Option Register 7
PGCRA      0x0E0  PCMCIA Interface General Control Register A
PGCRB      0x0E4  PCMCIA Interface General Control Register B
PSCR       0x0E8  PCMCIA Interface Status Changed Register
PIPR       0x0F0  PCMCIA Interface Input Pins Register
PER        0x0F8  PCMCIA Interface Enable Register

BR0        0x100  Base Register 0
OR0        0x104  Option Register 0
BR1        0x108  Base Register 1
OR1        0x10C  Option Register 1
BR2        0x110  Base Register 2
OR2        0x114  Option Register 2
BR3        0x118  Base Register 3
OR3        0x11C  Option Register 3
BR4        0x120  Base Register 4
OR4        0x124  Option Register 4
BR5        0x128  Base Register 5
OR5        0x12C  Option Register 5
BR6        0x130  Base Register 6
OR6        0x134  Option Register 6
BR7        0x138  Base Register 7
OR7        0x13C  Option Register 7
MAR        0x164  Memory Address Register
MCR        0x168  Memory Command Register
MAMR       0x170  Machine A Mode Register
MBMR       0x174  Machine B Mode Register
MSTAT      0x178  Memory Status
MPTPR      0x17A  Memory Periodic Timer Prescaler
MDR        0x17C  Memory Data register

TBSCR      0x200  Time Base Status and Control
TBREFA     0x204  Time Base Reference A
TBREFB     0x208  Time Base Reference B
RTCSC      0x220  Real-Time Clock Status and Control
RTC        0x224  Real-Time Clock
RTSEC      0x228  Real-Time Alarm Seconds
RTCAL      0x22C  Real-Time Alarm
PISCR      0x240  Periodic Interrupt Status and Control
PITC       0x244  Periodic Interrupt Count
PITR       0x248  Periodic Interrupt Register

SCCR       0x280  System Clock Control Register
PLPRCR     0x284  PLL Low-Power and Reset Control Register
RSR        0x288  Reset Status Register

TBSCRK     0x300  Time Base Status and Control Key
TBREFAK    0x304  Time Base Reference A Key
TBREFBK    0x308  Time Base Reference B Key
TBK        0x30C  Time Base and Decrementer Key
RTCSCK     0x320  Real-Time Clock Status and Control Key
RTCK       0x324  Real-Time Clock Key
RTSECK     0x328  Real-Time Alarm Seconds Key
RTCALK     0x32C  Real-Time Alarm Key
PISCRIK    0x340  PIT Status and Control Key
PITCK      0x344  PIT Count Key

SCCRK      0x380  System Clock Control Register Key
PLPRCRK    0x384  PLL Low-Power and Reset Control Register Key
RSRK       0x388  Reset Status Register Key

I2MOD      0x860  I2C Mode Register
I2ADD      0x864  I2C Address Register
I2BRG      0x868  I2C BRG Register
I2COM      0x86C  I2C Command Register
I2CER      0x870  I2C Event Register
I2CMR      0x874  I2C Mask Register

SDAR       0x904  SDMA Address Register
SDSR       0x908  SDMA Status Register
SDMR       0x90C  SDMA Mask Register
IDSR1      0x910  IDMA1 Status Register
IDMR1      0x914  IDMA1 Mask Register
IDSR2      0x918  IDMA2 Status Register
IDMR2      0x91C  IDMA2 Mask Register

CIVR       0x930  CPM Interrupt Vector Register
CICR       0x940  CPM Interrupt Configuration Register
CIPR       0x944  CPM Interrupt Pending Register
CIMR       0x948  CPM Interrupt Mask Register
CISR       0x94C  CPM In-service Register

PADIR      0x950  Port A Data Direction Register
PAPAR      0x952  Port A Pin Assignment Register
PAODR      0x954  Port A Open Drain Register
PADAT      0x956  Port A Data Register

PCDIR      0x960  Port C Data Direction Register
PCPAR      0x962  Port C Pin Assignment Register
PCSO       0x964  Port C Special Options Register
PCDAT      0x966  Port C Data Register
PCINT      0x968  Port C Interrupt Control Register

PDDIR      0x970  Port D Data Direction Register
PDPAR      0x972  Port D Pin Assignment Register
PDDAT      0x976  Port D Data Register

TGCR       0x980  Timer Global Configuration Register
TMR1       0x990  Timer 1 Mode Register
TMR2       0x992  Timer 2 Mode Register
TRR1       0x994  Timer 1 Reference Register
TRR2       0x996  Timer 2 Reference Register
TCR1       0x998  Timer 1 Capture Register
TCR2       0x99A  Timer 2 Capture Register
TCN1       0x99C  Timer 1 Counter Register
TCN2       0x99E  Timer 2 Counter Register
TMR3       0x9A0  Timer 3 Mode Register
TMR4       0x9A2  Timer 4 Mode Register
TRR3       0x9A4  Timer 3 Reference Register
TRR4       0x9A6  Timer 4 Reference Register
TCR3       0x9A8  Timer 3 Capture Register
TCR4       0x9AA  Timer 4 Capture Register
TCN3       0x9AC  Timer 3 Counter Register
TCN4       0x9AE  Timer 4 Counter Register
TER1       0x9B0  Timer 1 Event Register
TER2       0x9B2  Timer 2 Event Register
TER3       0x9B4  Timer 3 Event Register
TER4       0x9B6  Timer 4 Event Register

CPCR       0x9C0  CP Command Register
RCCR       0x9C4  RISC Controller Configuration Register
RCTR1      0x9CC  RISC Controller Trap Register 1
RCTR2      0x9CE  RISC Controller Trap Register 2
RCTR3      0x9D0  RISC Controller Trap Register 3
RCTR4      0x9D2  RISC Controller Trap Register 4
RTER       0x9D6  RISC Timer Event Register
RTMR       0x9DA  RISC Timers Mask Register

BRGC1      0x9F0  BRG1 Configuration Register
BRGC2      0x9F4  BRG2 Configuration Register
BRGC3      0x9F8  BRG3 Configuration Register
BRGC4      0x9FC  BRG4 Configuration Register

GSMR_L1    0xA00  SCC1 General Mode Register
GSMR_H1    0xA04  SCC1 General Mode Register
PSMR1      0xA08  SCC1 Protocol Specific Mode Register
TODR1      0xA0C  SCC1 Transmit on Demand Register
DSR1       0xA0E  SCC1 Data Synchronization Register
SCCE1      0xA10  SCC1 Event Register
SCCM1      0xA14  SCC1 Mask Register
SCCS1      0xA17  SCC1 Status Register

GSMR_L2    0xA20  SCC2 General Mode Register
GSMR_H2    0xA24  SCC2 General Mode Register
PSMR2      0xA28  SCC2 Protocol Specific Mode Register
TODR2      0xA2C  SCC2 Transmit on Demand Register
DSR2       0xA2E  SCC2 Data Synchronization Register
SCCE2      0xA30  SCC2 Event Register
SCCM2      0xA34  SCC2 Mask Register
SCCS2      0xA37  SCC2 Status Register

GSMR_L3    0xA40  SCC3 General Mode Register
GSMR_H3    0xA44  SCC3 General Mode Register
PSMR3      0xA48  SCC3 Protocol Specific Mode Register
TODR3      0xA4C  SCC3 Transmit on Demand Register
DSR3       0xA4E  SCC3 Data Synchronization Register
SCCE3      0xA50  SCC3 Event Register
SCCM3      0xA54  SCC3 Mask Register
SCCS3      0xA57  SCC3 Status Register

GSMR_L4    0xA60  SCC4 General Mode Register
GSMR_H4    0xA64  SCC4 General Mode Register
PSMR4      0xA68  SCC4 Protocol Specific Mode Register
TODR4      0xA6C  SCC4 Transmit on Demand Register
DSR4       0xA6E  SCC4 Data Synchronization Register
SCCE4      0xA70  SCC4 Event Register
SCCM4      0xA74  SCC4 Mask Register
SCCS4      0xA77  SCC4 Status Register

SMCMR1     0xA82  SMC1 Mode Register
SMCE1      0xA86  SMC1 Event Register
SMCM1      0xA8A  SMC1 Mask Register

SMCMR2     0xA92  SMC2 Mode Register
SMCE2      0xA96  SMC2 Event Register
SMCM2      0xA9A  SMC2 Mask Register

SPMODE     0xAA0  SPI Mode Register
SPIE       0xAA6  SPI Event Register
SPIM       0xAAA  SPI Mask Register
SPCOM      0xAAD  SPI Command Register

PIPC       0xAB2  PIP Configuration Register
PTPR       0xAB6  PIP Timing Parameters Register
PBDIR      0xAB8  Port B Data Direction Register
PBPAR      0xABC  Port B Pin Assignment Register
PBODR      0xAC0  Port B Open Drain Register
PBDAT      0xAC4  Port B Data Register

SIMODE     0xAE0  SI Mode Register
SIGMR      0xAE4  SI Global Mode Register
SISTR      0xAE6  SI Status Register
SICMR      0xAE7  SI Command Register
SICR       0xAEC  SI Clock Route Register
SIRP       0xAF0  SI RAM Pointer Register
SIRAM      0xC00  SI Routing RAM

ADDR_LOW   0xE00  FEC Address Low
ADDR_HIGH  0xE04  FEC Address High
HASH_TABLE_HIGH 0xE08  FEC Hash Table High
HASH_TABLE_LOW 0xE0C  FEC Hash Table Low
R_DES_START 0xE10  FEC RxBD Ring Start Pointer
X_DES_START 0xE14  FEC TxBD Ring Start Pointer
R_BUFF_SIZE 0xE18  FEC Receive Buffer Size
ECNTRL     0xE40  FEC Ethernet Control Register
IEVENT     0xE44  FEC Interrupt Event Register
IMASK      0xE48  FEC Interrupt Mask Register
IVEC       0xE4C  FEC Interrupt Level and Vector Status
R_DES_ACTIVE 0xE50 FEC Receive Ring Updated Flag
X_DES_ACTIVE 0xE54 FEC Transmit Ring Updated Flag
MII_DATA   0xE80  MII Data Register
MII_SPEED  0xE84  MII Speed Register
R_BOUND    0xECC  FEC End of FIFO RAM (read-only)
R_FSTART   0xED0  FEC Receive FIFO Start Address
X_WMRK     0xEE4  FEC Transmit Watermark
X_FSTART   0xEEC  FEC Transmit FIFO Start Address
FUN_CODE   0xF34  FEC Function Code to SDMA
R_CNTRL    0xF44  FEC Receive Control Register
R_HASH     0xF48  FEC Receive Hash Register
X_CNTRL    0xF84  FEC Transmit Control Register
DPRAM      0x2000 Dual-port System RAM
DPRAMEXP   0x3000 Dual-port System RAM Expansion
PRAM       0x3C00 Dual-port Parameter RAM

;--------------------------------------
; Standard PowerPC SPR
spr   xer     1           Integer exception register
spr   lr      8           Link register
spr   ctr     9           Count register
spr   dsisr   18          DAE/source instruction service register
spr   dar     19          Data address register
spr   dec     22          Decrementer
spr   sdr1    25          SDR1 register
spr   srr0    26          Machine status save/restore register 0
spr   srr1    27          Machine status save/restore register 1
spr   sprg0   272         General special purpose register 0
spr   sprg1   273         General special purpose register 1
spr   sprg2   274         General special purpose register 2
spr   sprg3   275         General special purpose register 3
spr   tblw    284         Time base facility for writing (lower)
spr   tbuw    285         Time base facility for writing (upper)
spr   pvr     287         Processor version register

;--------------------------------------
; MPC860 specific Supervisor-Level SPR
spr   eie     80          External interrupt enable
spr   eid     81          External interrupt disable
spr   nri     82          Non-recoverable interrupt
spr   ic_csr  560             I-cache Control and Status Register
spr   ic_adr  561             I-cache Address Register
spr   ic_dat  562             I-cache Data Port (Read Only)
spr   dc_cst  568             D-cache Control and Status Register
spr   dc_adr  569             D-cache Address Register
spr   dc_dat  570             D-cache Data Port (Read Only)

spr   dpir    631             Development Port Instruction Register
spr   immr    638             Internal Memory Map register

spr   mi_ctr  784             I-MMU Control Register
spr   mi_ap   786             I-MMU Access Protect Register
spr   mi_epn  787             I-MMU Effective Page Number Register
spr   mi_twc  789             I-MMU Tablewalk Control Register
spr   mi_rpn  790             I-MMU Real Page Number Register
spr   mi_cam  816             I-MMU CAM Entry Read Register
spr   mi_ram0 817             I-MMU RAM Entry Read Register 0
spr   mi_ram1 818             I-MMU RAM Entry Read Register 1

spr   md_ctr  792             D-MMU Control Register
spr   m_casid 793             MMU Current Address Sapce ID Register
spr   md_ap   794             D-MMU Access Protect Register
spr   md_epn  795             D-MMU Effective Page Number Register
spr   m_twb   796             MMU Tablewalk Base Register
spr   md_twc  797             D-MMU Tablewalk Control Register
spr   md_rpn  798             D-MMU Real Page Number Register
spr   m_tw    799             MMU Tablewalk Special Register
spr   md_cam  824             D-MMU CAM Entry Read Register
spr   md_ram0 825             D-MMU RAM Entry Read Register 0
spr   md_ram1 826             D-MMU RAM Entry Read Register 1

;--------------------------------------
; MPC860-Specific Debug-Level SPRs
spr   cmpa    144         Comparator A value register
spr   cmpb    145         Comparator B value register
spr   cmpc    146         Comparator C value register
spr   cmpd    147         Comparator D value register
spr   ecr     148         Exception cause register
spr   der     149         Debug enable register
spr   counta  150         Breakpoint Counter A value and control register
spr   countb  151         Breakpoint Counter B value and control register
spr   cmpe    152         Comparator E value register
spr   cmpf    153         Comparator F value register
spr   cmpg    154         Comparator G value register
spr   cmph    155         Comparator H value register
spr   lctrl1  156         L-bus support control register 1
spr   lctrl2  157         L-bus support control register 2
spr   ictrl   158         I-bus support control register
spr   bar     159         Breakpoint address register
spr   dpdr    630         Development port data register

.mpc5xx
PROFILE=EMBEDDED
SIMD=SPE
;--------------------------------------
; Memory mapped I/O
; default MMIO base is 0 and can be changed by programming the IMMR SPR
MMIOBASE=0
SIUMCR     0x2FC000  SIU Module Configuration Register
SYPCR      0x2FC004  System Protection Control Register
SWSR       0x2FC00E  Software Service Register
SIPEND     0x2FC010  Interrupt Pending Register
SIMASK     0x2FC014  Interrupt Mask Register
SIEL       0x2FC018  Interrupt Edge Level Mask
SIVEC      0x2FC01C  Interrupt Vector
TESR       0x2FC020  Transfer Error Status Register
SGPIODT1   0x2FC024  USIU General-Purpose I/O Data Register
SGPIODT2   0x2FC028  USIU General-Purpose I/O Data Register 2
SGPIOCR    0x2FC02C  USIU General-Purpose I/O Control Register
EMCR       0x2FC030  External Master Mode Control Register
PDMCR      0x2FC03C  Pads Module Configuration Register

BR0        0x2FC100  Base Register 0
OR0        0x2FC104  Option Register 0
BR1        0x2FC108  Base Register 1
OR1        0x2FC10C  Option Register 1
BR2        0x2FC110  Base Register 2
OR2        0x2FC114  Option Register 2
BR3        0x2FC118  Base Register 3
OR3        0x2FC11C  Option Register 3
DMBR       0x2FC140  Dual-Mapping Base Register
DMOR       0x2FC144  Dual-Mapping Option Register
MSTAT      0x2FC178  Memory Status

TBSCR      0x2FC200  Time Base Status and Control
TBREF0     0x2FC204  Time Base Reference 0
TBREF1     0x2FC208  Time Base Reference 1
RTCSC      0x2FC220  Real-Time Clock Status and Control
RTC        0x2FC224  Real-Time Clock
RTSEC      0x2FC228  Real-Time Alarm Seconds
RTCAL      0x2FC22C  Real-Time Alarm
PISCR      0x2FC240  Periodic Interrupt Status and Control
PITC       0x2FC244  Periodic Interrupt Count
PITR       0x2FC248  Periodic Interrupt Register

SCCR       0x2FC280  System Clock Control Register
PLPRCR     0x2FC284  PLL Low-Power and Reset Control Register
RSR        0x2FC288  Reset Status Register
COLIR      0x2FC28C  Change of Lock Interrupt Register
VSRMCR     0x2FC290  VDDSRM Control Register

TBSCRK     0x2FC300  Time Base Status and Control Key
TBREF0K    0x2FC304  Time Base Reference 0 Key
TBREF1K    0x2FC308  Time Base Reference 1 Key
TBK        0x2FC30C  Time Base and Decrementer Key
RTCSCK     0x2FC320  Real-Time Clock Status and Control Key
RTCK       0x2FC324  Real-Time Clock Key
RTSECK     0x2FC328  Real-Time Alarm Seconds Key
RTCALK     0x2FC32C  Real-Time Alarm Key
PISCRIK    0x2FC340  PIT Status and Control Key
PITCK      0x2FC344  PIT Count Key

SCCRK      0x2FC380  System Clock Control Register Key
PLPRCRK    0x2FC384  PLL Low-Power and Reset Control Register Key
RSRK       0x2FC388  Reset Status Register Key

;--------------------------------------
; PowerPC SPRs
spr   xer      1					
spr   lr      8						
spr   ctr      9					
;--------------------------------------
; PowerPC SPRs
spr   dsisr   18          DAE/source instruction service register
spr   dar     19          Data address register
spr   dec     22          Decrementer
spr   srr0    26          Machine status save/restore register 0
spr   srr1    27          Machine status save/restore register 1
spr   eie     80          External interrupt enable
spr   eid     81          External interrupt disable
spr   nri     82          Non-recoverable interrupt
spr   cmpa    144         Comparator A value register
spr   cmpb    145         Comparator B value register
spr   cmpc    146         Comparator C value register
spr   cmpd    147         Comparator D value register
spr   ecr     148         Exception cause register
spr   der     149         Debug enable register
spr   counta  150         Breakpoint Counter A value and control register
spr   countb  151         Breakpoint Counter B value and control register
spr   cmpe    152         Comparator E value register
spr   cmpf    153         Comparator F value register
spr   cmpg    154         Comparator G value register
spr   cmph    155         Comparator H value register
spr   lctrl1  156         L-bus support control register 1
spr   lctrl2  157         L-bus support control register 2
spr   ictrl   158         I-bus support control register
spr   bar     159         Breakpoint address register
spr   tbl     268         Time base facility for reading (lower)
spr   tbu     269         Time base facility for reading (upper)
spr   sprg0   272         General special purpose register 0
spr   sprg1   273         General special purpose register 1
spr   sprg2   274         General special purpose register 2
spr   sprg3   275         General special purpose register 3
spr   tblw    284         Time base facility for writing (lower)
spr   tbuw    285         Time base facility for writing (upper)
spr   pvr     287         Processor version register
spr   dpdr    630         Development port data register
spr   fpecr   1022        Floating-point exception cause register
;--------------------------------------
; MPC5xx specific SPR
spr   mi_gra   528        IMPU Global Region Attribute
spr   eibadr   529        External Interrupt Relocation Table Base Address Register
spr   l2u_gra  536        L2U Global Region Attribute
spr   bbcmcr   560        BBC Module Configuration Register
spr   l2u_mcr  568        L2U Module Configuration Register
spr   dpdr     630        Development Port Data Register
spr   immr     638        Internal Memory Mapping Register
spr   mi_rba0  784        IMPU Region Base Address 0
spr   mi_rba1  785        IMPU Region Base Address 1
spr   mi_rba2  786        IMPU Region Base Address 2
spr   mi_rba3  787        IMPU Region Base Address 3
spr   l2u_rba0 792        L2U Region Base Address Register 0
spr   l2u_rba1 793        L2U Region Base Address Register 1
spr   l2u_rba2 794        L2U Region Base Address Register 2
spr   l2u_rba3 795        L2U Region Base Address Register 3
spr   mi_ra0   816        IMPU Region Attribute Register 0
spr   mi_ra1   817        IMPU Region Attribute Register 1
spr   mi_ra2   818        IMPU Region Attribute Register 2
spr   mi_ra3   819        IMPU Region Attribute Register 3
spr   l2u_ra0  824        L2U Region Attribute Register 0
spr   l2u_ra1  825        L2U Region Attribute Register 1
spr   l2u_ra2  826        L2U Region Attribute Register 2
spr   l2u_ra3  827        L2U Region Attribute Register 3

.mpc55xx
PROFILE=EMBEDDED
SIMD=SPE
area CODE FLASH      0x00000000:0x00300000
area DATA RAM        0x40000000:0x40030000
;--------------------------------------
; Memory mapped I/O (incomplete)

PBRIDGEA_MPCR        0xC3F00000
PBRIDGEA_PACR0       0xC3F00020
PBRIDGEA_OPACR0      0xC3F00040
PBRIDGEA_OPACR1      0xC3F00044
PBRIDGEA_OPACR2      0xC3F00048

FMPLL_SYNCR          0xC3F80000
FMPLL_SYNSR          0xC3F80004

EBI_MCR              0xC3F84000
EBI_TESR             0xC3F84008
EBI_BMCR             0xC3F8400C
EBI_BR0              0xC3F84010
EBI_OR0              0xC3F84014
EBI_BR1              0xC3F84018
EBI_OR1              0xC3F8401C
EBI_BR2              0xC3F84020
EBI_OR2              0xC3F84024
EBI_BR3              0xC3F84028
EBI_OR3              0xC3F8402C
EBI_CAL_BR0          0xC3F84040
EBI_CAL_OR0          0xC3F84044
EBI_CAL_BR1          0xC3F84048
EBI_CAL_OR1          0xC3F8404C
EBI_CAL_BR2          0xC3F84050
EBI_CAL_OR2          0xC3F84054
EBI_CAL_BR3          0xC3F84058
EBI_CAL_OR3          0xC3F8405C

FLASH_MCR            0xC3F88000
FLASH_LMLR           0xC3F88004
FLASH_HLR            0xC3F88008
FLASH_SLMLR          0xC3F8800C
FLASH_LMSR           0xC3F88010
FLASH_HSR            0xC3F88014
FLASH_AR             0xC3F88018
FLASH_BIUCR          0xC3F8801C
FLASH_BIUAPR         0xC3F88020

SIU_MIDR             0xC3F90004
SIU_RSR              0xC3F9000C
SIU_SRCR             0xC3F90010
SIU_EISR             0xC3F90014
SIU_DIRER            0xC3F90018
SIU_DIRSR            0xC3F9001C
SIU_OSR              0xC3F90020
SIU_ORER             0xC3F90024
SIU_IREER            0xC3F90028
SIU_IFEER            0xC3F9002C
SIU_IDFR             0xC3F90030
SIU_PCR0             0xC3F90040

;--------------------------------------
; PowerPC SPRs
spr   xer      1					
spr   lr      8						
spr   ctr      9					
;--------------------------------------
; e200z6 Core SPR Numbers (Supervisor Mode)
spr   sprg0   272         General special purpose register 0
spr   sprg1   273         General special purpose register 1
spr   sprg2   274         General special purpose register 2
spr   sprg3   275         General special purpose register 3
spr   sprg4   276         General special purpose register 4
spr   sprg5   277         General special purpose register 5
spr   sprg6   278         General special purpose register 6
spr   sprg7   279         General special purpose register 7
spr   usprg0  256         User Special Purpose Register
spr   bucsr   1013        Branch Unit Control and Status Register
spr   srr0    26          Machine status save/restore register 0
spr   srr1    27          Machine status save/restore register 1
spr  csrr0     58         Critical Save and Restore Register 0
spr  csrr1     59         Critical Save and Restore Register 1
spr  dsrr0    574         Debug Save and Restore Register 0
spr  dsrr1    575         Debug Save and Restore Register 1
spr  esr       62         Exception Syndrome Register
spr  mcsr     572         Machine Check Syndrome Register
spr  dear      61         Data Exception Address Register
spr  ivpr      63         Interrupt Vector Prefix Register
spr  ivor0    400         Interrupt Vector Offset Register 0
spr  ivor1    401         Interrupt Vector Offset Register 1
spr  ivor2    402         Interrupt Vector Offset Register 2
spr  ivor3    403         Interrupt Vector Offset Register 3
spr  ivor4    404         Interrupt Vector Offset Register 4
spr  ivor5    405         Interrupt Vector Offset Register 5
spr  ivor6    406         Interrupt Vector Offset Register 6
spr  ivor7    407         Interrupt Vector Offset Register 7
spr  ivor8    408         Interrupt Vector Offset Register 8
spr  ivor9    409         Interrupt Vector Offset Register 9
spr  ivor10   410         Interrupt Vector Offset Register 10
spr  ivor11   411         Interrupt Vector Offset Register 11
spr  ivor12   412         Interrupt Vector Offset Register 12
spr  ivor13   413         Interrupt Vector Offset Register 13
spr  ivor14   414         Interrupt Vector Offset Register 14
spr  ivor15   415         Interrupt Vector Offset Register 15
spr  ivor32   528         Interrupt Vector Offset Register 32
spr  ivor33   529         Interrupt Vector Offset Register 33
spr  ivor34   530         Interrupt Vector Offset Register 34
spr  pvr     287         Processor version register
spr  pir     286         Processor ID Register
spr  svr     1023        System Version Register
spr  hid0    1008        Hardware Implementation Dependent Register 0
spr  hid1    1009        Hardware Implementation Dependent Register 1
spr  tblw    284         Time base facility for writing (lower)
spr  tbuw    285         Time base facility for writing (upper)
spr  tblr    268         Time base facility for reading (lower)
spr  tbur    269         Time base facility for reading (upper)
spr  tcr       340       Timer Control Register
spr  tsr       336       Timer Status Register
spr  dec        22       Decrementer Register
spr  decar      54       Decrementer Auto-reload Register

spr  pid0       48       Process ID Register
spr  mmucsr0  1012       MMU Control and Status Register 0
spr  mmucfg   1015       MMU Configuration Register
spr  tlb0cfg   688       TLB 0 Configuration Register
spr  tlb1cfg   689       TLB 1 Configuration Register
spr  mas0      624       MMU Assist Register 0
spr  mas1      625       MMU Assist Register 1
spr  mas2      626       MMU Assist Register 2
spr  mas3      627       MMU Assist Register 3
spr  mas4      628       MMU Assist Register 4
spr  mas6      630       MMU Assist Register 6

spr  l1cfg0    515       L1 Cache Configuration Register
spr  l1csr0   1010       L1 Cache Control and Status Register 0
spr  l1finv0  1016       L1 Cache Flush and Invalidate Control Register 0

spr  spefscr   512       SPE APU Status and Control Register
                 
spr  dbcr0    308        Debug Control Register 0
spr  dbcr1    309        Debug Control Register 1
spr  dbcr2    310        Debug Control Register 2
spr  dbcr3    561        Debug Control Register 3
spr  dbsr     304        Debug Status Register
spr  dbcnt    562        Debug Counter Register
spr  iac1     312        Instruction Address Compare Register 1
spr  iac2     313        Instruction Address Compare Register 2
spr  iac3     314        Instruction Address Compare Register 3
spr  iac4     315        Instruction Address Compare Register 4
spr  dac1     316        Data Address Compare Register 1
spr  dac2     317        Data Address Compare Register 2
                 
.CellBE
SIMD=ALTIVEC
PROFILE=SERVER
;--------------------------------------
; Memory mapped I/O
;--------------------------------------
; Standard PowerPC SPR
spr   xer     1           Integer exception register
spr   lr      8           Link register
spr   ctr     9           Count register
spr   dsisr   18          DAE/source instruction service register
spr   dar     19          Data address register
spr   dec     22          Decrementer
spr   sdr1    25          SDR1 register
spr   srr0    26          Machine status save/restore register 0
spr   srr1    27          Machine status save/restore register 1
spr   accr    29          Address Compare Control Register
spr   eie     80          External interrupt enable
spr   eid     81          External interrupt disable
spr   nri     82          Non-recoverable interrupt
spr   cmpa    144         Comparator A value register
spr   cmpb    145         Comparator B value register
spr   cmpc    146         Comparator C value register
spr   cmpd    147         Comparator D value register
spr   ecr     148         Exception cause register
spr   der     149         Debug enable register
spr   counta  150         Breakpoint Counter A value and control register
spr   countb  151         Breakpoint Counter B value and control register
spr   cmpe    152         Comparator E value register
spr   cmpf    153         Comparator F value register
spr   cmpg    154         Comparator G value register
spr   cmph    155         Comparator H value register
spr   lctrl1  156         L-bus support control register 1
spr   lctrl2  157         L-bus support control register 2
spr   ictrl   158         I-bus support control register
spr   bar     159         Breakpoint address register
spr   vrsave  256         Vector Restore/Save
spr   sprg3_r 259         General special purpose register 3 - Read Only
spr   tbl     268         Time Base Register - Read Only
spr   tbu     269         Time Base Upper Register - Read Only
spr   sprg0   272         General special purpose register 0
spr   sprg1   273         General special purpose register 1
spr   sprg2   274         General special purpose register 2
spr   sprg3   259         General special purpose register 3
spr   asr     280         Address space register
spr   ear     282         External address register
spr   tblw    284         Time Base Lower Register - Write Only
spr   tbuw    285         Time Base Upper Register - Write Only
spr   pvr     287         Processor version register

spr   ibat0u  528         Instruction BAT register 0 (upper)
spr   ibat0l  529         Instruction BAT register 0 (lower)
spr   ibat1u  530         Instruction BAT register 1 (upper)
spr   ibat1l  531         Instruction BAT register 1 (lower)
spr   ibat2u  532         Instruction BAT register 2 (upper)
spr   ibat2l  533         Instruction BAT register 2 (lower)
spr   ibat3u  534         Instruction BAT register 3 (upper)
spr   ibat3l  535         Instruction BAT register 3 (lower)
spr   dbat0u  536         Data BAT register 0 (upper)
spr   dbat0l  537         Data BAT register 0 (lower)
spr   dbat1u  538         Data BAT register 1 (upper)
spr   dbat1l  539         Data BAT register 1 (lower)
spr   dbat2u  540         Data BAT register 2 (upper)
spr   dbat2l  541         Data BAT register 2 (lower)
spr   dbat3u  542         Data BAT register 3 (upper)
spr   dbat3l  543         Data BAT register 3 (lower)
;spr   iccsr   560         I-cache control and status register
;spr   icadr   561         I-cache address register
;spr   icdat   562         I-cache data port (read only)
spr   dpdr    630         Development port data register
spr   sia     780         Sampled Instruction Address
spr   sda     781         Sampled Data Address
;spr   pmc1    787         Performance Monitor Counter 1 (read only)
;spr   pmc2    788         Performance Monitor Counter 2 (read only)
;spr   pmc3    789         Performance Monitor Counter 3 (read only)
;spr   pmc4    790         Performance Monitor Counter 4 (read only)
;spr   pmc5    791         Performance Monitor Counter 5 (read only)
;spr   pmc6    792         Performance Monitor Counter 6 (read only)
;spr   pmc7    793         Performance Monitor Counter 7 (read only)
;spr   pmc8    794         Performance Monitor Counter 8 (read only)
;spr   mmcr0   795         Monitor Mode Control Register 0 (read only)
;spr   mmcr1   798         Monitor Mode Control Register 1 (read only)

;--------------------------------------
; Cell-specific SPR
spr   ctrl_r  136        Control Register (Read)
spr   ctrl_w  152        Control Register (Write)
spr   hsprg0  304         Hypervisor Software Use Special Purpose Register 0
spr   hsprg1  305         Hypervisor Software Use Special Purpose Register 1
spr   hdec    310         Hypervisor Decrementer Register
spr   rmor    312         Real Mode Offset Register
spr   hrmor   313         Hypervisor Real Mode Offset Register
spr   hsrr0   314         Hypervisor Machine Status Save/Restore Register 0
spr   hsrr1   315         Hypervisor Machine Status Save/Restore Register 1
spr   lpcr    318         Logical Partition Control Register
spr   lpidr   319         Logical Partition Identity Register
spr   tsrl    896         Thread Status Register Local
spr   tsrr    897         Thread Status Register Remote
spr   tscr    921         Thread Switch Control Register
spr   ttr     922         Thread Switch Timeout Register

spr   ppe_tlb_index_hint 946   TLB Index Hint Register (read only)
spr   ppe_tlb_index      947   TLB Index Register (write only)
spr   ppe_tlb_vpn        948   TLB Virtual Page Number Register
spr   ppe_tlb_rpn        949   TLB Real Page Number Register
spr   ppe_tlb_rmt_index  950   RMT Index Register
spr   ppe_tlb_rmt_data   951   RMT Data Register
spr   drsr0   952         Data Range Start Register 0
spr   drmr0   953         Data Range Mask Register 0
spr   dcidr0  954         Data Class ID Register 0
spr   drsr1   955         Data Range Start Register 1
spr   drmr1   956         Data Range Mask Register 1
spr   dcidr1  957         Data Class ID Register 1
spr   irsr0   976         Instruction Range Start Register 0
spr   irmr0   977         Instruction Range Mask Register 0
spr   icidr0  978         Instruction Class ID Register 0
spr   irsr1   979         Instruction Range Start Register 1
spr   irmr1   980         Instruction Range Mask Register 1
spr   icidr1  981         Instruction Class ID Register 1

spr   hid0    1008        Hardware Implementation Register 0
spr   hid1    1009        Hardware Implementation Register 1
spr   hid4    1012        Hardware Implementation Register 4
spr   dabr    1013        Data Address Breakpoint Register
spr   hid5    1014        Hardware Implementation Register 5
spr   dabrx   1015        Data Address Breakpoint Register Extension
spr   hid6    1017        Hardware Implementation Register 6
spr   hid7    1018        Hardware Implementation Register 7
spr   bp_vr   1022        Processor Version Register (read only)
spr   pir     1023        Processor Identification Register